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Institution · Amkor Technology (United States)

Most cited papers from Amkor Technology (United States)

Amkor Technology (United States)

What are the most cited papers from Amkor Technology (United States)?

The most cited paper from Amkor Technology (United States) is "Accumulated creep strain and energy density based thermal fatigue life prediction models for SnAgCu solder joints" (A. Syed, 2004), with 359 citations. Next come "Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages" (154) and "Model for BGA and CSP Reliability in Automotive Underhood Applications" (139).

Showing 50 of 58 papers. Every paper with more than 24 citations is listed.

Most cited papers, sortable by citations and release date
#Paper
1 Accumulated creep strain and energy density based thermal fatigue life prediction models for SnAgCu solder joints A. Syed Conference paper 28 Sep 2004 359
2 Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages Yaojiang Zhang, Jun Fan, Giuseppe Selli et al. · IEEE Transactions on Microwave Theory and Techniques 19 Aug 2008 154
3 Model for BGA and CSP Reliability in Automotive Underhood Applications Pradeep Lall, Md Nazmul Islam, Naveen K. Singh et al. · IEEE Transactions on Components and Packaging Technologies Sep 2004 139
4 An Efficient Approach for Power Delivery Network Design With Closed-Form Expressions for Parasitic Interconnect Inductances Cheng‐Xiang Wang, Jie Mao, Giuseppe Selli et al. · IEEE Transactions on Advanced Packaging May 2006 129
5 Predicting solder joint reliability for thermal, power, and bend cycle within 25% accuracy A. Syed Conference paper 13 Nov 2002 125
6 3D-MAPS: 3D Massively parallel processor with stacked memory Dae Hyun Kim et al. Conference paper Feb 2012 116
7 Next generation fine pitch Cu Pillar technology — Enabling next generation silicon nodes Mark Gerber, Craig Beddingfield, Shawn P. O'Connor et al. Conference paper May 2011 104
8 Shear deformation of lead free solder joints Robert Darveaux Conference paper 28 Jul 2005 103
9 A Study on Package Stacking Process for Package-on-Package (PoP) Akito Yoshida, Jun Taniguchi, K. Murata et al. Conference paper 10 Jul 2006 94
10 Temperature Effect on Intermetallic Compound Growth Kinetics of Cu Pillar/Sn Bumps Gi-Tae Lim, Byoung‐Joon Kim, Kiwook Lee et al. · Journal of Electronic Materials 17 Aug 2009 78
11 High temperature lead-free solder for microelectronics Frank W. Gayle, G.A. Becka, Ahmer R. Syed et al. · JOM Jun 2001 72
12 Analysis of a thermally enhanced ball grid array package B.M. Guenin, R.C. Marrs, R. J. Molnar Conference paper 19 Nov 2002 66
13 A Methodology for Drop Performance Modeling and Application for Design Optimization of Chip-Scale Packages Ahmer Syed, Seung Mo Kim, Wei Lin et al. · IEEE Transactions on Electronics Packaging Manufacturing 2007 66
14 Feature extraction and damage-precursors for prognostication of lead-free electronics Pradeep Lall, Madhura Hande, Chandan Bhat et al. · Microelectronics Reliability 21 Apr 2007 64
15 Study of interconnection process for fine pitch flip chip Minjae Lee, Min Seok Yoo, J. Cho et al. Conference paper May 2009 64
16 Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory) Dae Hyun Kim et al. · IEEE Transactions on Computers Oct 2013 63
17 Updated Life Prediction Models for Solder Joints with Removal of Modeling Assumptions and Effect of Constitutive Equations A. Syed Conference paper 10 Jul 2006 61
18 Interface Failure in Lead Free Solder Joints Robert Darveaux, Corey Reichman, Nokibul Islam Conference paper 10 Jul 2006 60
19 Solder metallization interdiffusion in microelectronic interconnects A. Zribi, Richard R. Chromik, R. Presthus et al. · IEEE Transactions on Components and Packaging Technologies Jun 2000 60
20 High Density PoP (Package-on-Package) and Package Stacking Development Moody Dreiza, Akito Yoshida, Kazuo Ishibashi et al. Conference paper 2007 60
21 Reliability testing of Cu-Sn intermetallic micro-bump interconnections for 3D-device stacking Riet Labie, Paresh Limaye, Kyung-Woo Lee et al. Conference paper Sep 2010 60
22 Shear testing and failure mode analysis for evaluation of BGA ball attachment Robert Erich, Richard J. Coyle, George M. Wenger et al. Conference paper 20 Jan 2003 56
23 Application of through mold via (TMV) as PoP base package Jinseong Kim, Kiwook Lee, Dongjoo Park et al. Conference paper May 2008 54
24 Intermetallic Compound Growth and Reliability of Cu Pillar Bumps Under Current Stressing Byoung‐Joon Kim, Gi-Tae Lim, Jae-Dong Kim et al. · Journal of Electronic Materials 20 Jul 2010 52
25 Single-step fluorescence recognition of As 3+ , Nd 3+ and Br − using pyrene-linked calix[4]arene: application to real samples, computational modelling and paper-based device Pinkesh G. Sutariya, Heni N. Soni, Sahaj A. Gandhi et al. · New Journal of Chemistry 22 Nov 2018 51
26 Methodology for thermal evaluation of multichip modules B.S. Lall, B.M. Guenin, R. J. Molnar Conference paper 19 Nov 2002 49
27 Improving electromagnetic compatibility performance of packages and SiP modules using a conformal shielding solution Nozad Karim, Jingkun Mao, Jun Fan Conference paper 2010 49
28 PoP/CSP warpage evaluation and viscoelastic modeling Wei Lin, Min Woo Lee Conference paper May 2008 47
29 Solder joint fatigue life of fine pitch BGAs – impact of design and material choices Robert Darveaux, Jim Heckman, Ahmer R. Syed et al. · Microelectronics Reliability Jul 2000 45
30 Substrate Trace Modeling for Package Warpage Simulation Mingji Wang, Brendan C. Wells Conference paper May 2016 44
31 Silicon Wafer Integrated Fan-out Technology Curtis Zwenger, George Scott, Ron Huemoeller et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) Conference paper 2017 44
32 Damage mechanics of electronics on metal-backed substrates in harsh environments Pradeep Lall, Md Nazmul Islam, John L. Evans et al. · IEEE Transactions on Components and Packaging Technologies Mar 2006 44
33 Mechanical Properties of Lead-Free Solders Robert Darveaux, Corey Reichman Conference paper 2007 42
34 Alloying effect of Ni, Co, and Sb in SAC solder for improved drop performance of chip scale packages with Cu OSP pad finish Ahmer R. Syed, Tae‐il Kim, Young Hoon Cho et al. Conference paper 2006 41
35 Study on the Board Level Reliability Test of Package on Package (PoP) with 2nd Level Underfill Joonyeob Lee, Tae-Kyung Hwang, Jin‐Young Kim et al. Conference paper 2007 39
36 Heterogeneous Integration Using Organic Interposer Technology George Scott, JaeHun Bae, KiYeul Yang et al. Conference paper Jun 2020 37
37 Reliability and Au embrittlement of lead free solders for BGA applications A. Syed Conference paper 13 Nov 2002 36
38 Ductile-to-brittle transition strain rate Robert Darveaux, Corey Reichman Conference paper 2006 36
39 Advanced Analysis of WLCSP Copper Interconnect Reliability under Board Level Drop Test Tong Yan Tee, B Long, Rex Anderson et al. Conference paper Dec 2008 36
40 Cu Pillar and μ-bump electromigration reliability and comparison with high pb, SnPb, and SnAg bumps Ahmer R. Syed, Karthikeyan Dhandapani, Robert Moody et al. Conference paper May 2011 35
41 Thermal Test Chip Design and Performance Considerations Bernie Siegal, Jesse E. Galloway Conference paper Mar 2008 33
42 Are we over designing for solder joint reliability? Field vs. accelerated conditions, realistic vs. specified requirements A. Syed, M. Doty Conference paper 20 Jan 2003 33
43 Multi-die chip on wafer thermo-compression bonding using non-conductive film David Hiner, Dong Wook Kim, Seokgeun Ahn et al. Conference paper May 2015 32
44 Plastic Deformation and Life Prediction of Solder Joints for Mechanical Shock and Drop/Impact Loading Conditions Ahmer R. Syed, Wei Lin, EunSook Sohn et al. Conference paper 2007 31
45 A methodology for drop performance prediction and application for design optimization of chip scale packages A. Syed, Seung Mo Kim, Wei Lin et al. Conference paper 28 Jul 2005 30
46 SLIM (TM), High Density Wafer Level Fan-Out Package Development with Submicron RDL YoungRae Kim, JaeHun Bae, MinHwa Chang et al. Conference paper May 2017 30
47 Electrical and Thermal Simulation of SWIFT (TM) High-Density Fan-Out PoP Technology Curtis Zwenger, George Scott, Bora Baloglu et al. Conference paper May 2017 30
48 Limitations of Norris-Landzberg equation and application of damage accumulation based methodology for estimating acceleration factors for Pb free solders Ahmer R. Syed Conference paper Apr 2010 29
49 Impact of package design and materials on reliability for temperature cycling, bend, and drop loading conditions Ahmer R. Syed, Joan Scanlan, SeWoong Cha et al. Conference paper May 2008 29
50 Chip Stackable, Ultra-thin, High-Flexibility 3D FOWLP (3D SWIFT® Technology) for Hetero-Integrated Advanced 3D WL-SiP WonMyoung Ki, Wongeol Lee, InSu Mok et al. Conference paper May 2018 28

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.