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Institution · ARM (United Kingdom)

Most cited papers from ARM (United Kingdom)

ARM (United Kingdom)

What are the most cited papers from ARM (United Kingdom)?

The most cited paper from ARM (United Kingdom) is "Leakage current: Moore's law meets static power" (N.S. Kim, T. Austin, D. Blaauw et al., 2003), with 1,230 citations. Next come "Razor: a low-power pipeline based on circuit-level timing speculation" (857) and "Drowsy caches" (740).

Showing 50 of 56 papers. Every paper with more than 55 citations is listed.

Most cited papers, sortable by citations and release date
#Paper
1 Leakage current: Moore's law meets static power N.S. Kim, T. Austin, D. Blaauw et al. · Computer Dec 2003 1,230
2 Razor: a low-power pipeline based on circuit-level timing speculation Daniel J. Ernst, Nam Sung Kim, Shidhartha Das et al. Conference paper 2003 857
3 Drowsy caches Krisztián Flautner, Nam Sung Kim, Steve J. Martin et al. · ACM SIGARCH Computer Architecture News May 2002 740
4 A Survey of Network Lifetime Maximization Techniques in Wireless Sensor Networks Halil Yetgin, Kent Tsz Kan Cheung, Mohammed El‐Hajjar et al. · IEEE Communications Surveys & Tutorials 2017 631
5 RazorII: In Situ Error Detection and Correction for PVT and SER Tolerance Shidhartha Das, Carlos Tokunaga, Sanjay Pant et al. · IEEE Journal of Solid-State Circuits 2009 597
6 Securing the Internet of Things: A Standardization Perspective Sye Loong Keoh, Sandeep S. Kumar, Hannes Tschofenig · IEEE Internet of Things Journal 16 May 2014 482
7 Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation Brett Stanley Feero, Partha Pratim Pande · IEEE Transactions on Computers 19 Aug 2008 467
8 Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads Steven M. Martin, Krisztián Flautner, Trevor Mudge et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design Conference paper 2002 444
9 Theoretical and practical limits of dynamic voltage scaling Bo Zhai, David T. Blaauw, Dennis Sylvester et al. Conference paper 7 Jun 2004 425
10 Razor: circuit-level correction of timing errors for low-power operation Daniel J. Ernst, Shidhartha Das, Sang Hyun Lee et al. · IEEE Micro Nov 2004 413
11 A Self-Tuning DVS Processor Using Delay-Error Detection and Correction Shidhartha Das, David Roberts, Sang Hyun Lee et al. · IEEE Journal of Solid-State Circuits Apr 2006 394
12 AI Benchmark: Running Deep Neural Networks on Android Smartphones Andrey Ignatov, Radu Timofte, William Y. Chou et al. · Lecture notes in computer science Conference paper 2019 348
13 Drowsy caches: simple techniques for reducing leakage power Krisztián Flautner, Nam Sung Kim, Steve J. Martin et al. Conference paper 25 Jun 2003 347
14 Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance David T. Blaauw, S. A. Kalaiselvan, Kevin Lai et al. Conference paper Feb 2008 311
15 A natively flexible 32-bit Arm microprocessor John Biggs, James Myers, Jedrzej Kufel et al. · Nature 21 Jul 2021 280
16 SODA Yuan Lin, Hyunseok Lee, Mark Woh et al. · ACM SIGARCH Computer Architecture News May 2006 212
17 Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization Nathan Clark, Manjunath Kudlur, Hyunchul Park et al. Conference paper 13 Dec 2005 201
18 A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation David Bull, Shidhartha Das, Karthik Shivashankar et al. · IEEE Journal of Solid-State Circuits 23 Nov 2010 171
19 Vertigo Krisztián Flautner, Trevor Mudge · ACM SIGOPS Operating Systems Review 31 Dec 2002 165
20 Circuit and microarchitectural techniques for reducing cache leakage power Nam Sung Kim, Krisztián Flautner, David T. Blaauw et al. Feb 2004 158
21 Modelling the ARMv8 architecture, operationally: concurrency and ISA Shaked Flur, Kathryn E. Gray, Christopher Pulte et al. Conference paperOpen access 7 Jan 2016 142
22 An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors Nathan Clark, Jason A. Blome, Michael L. Chu et al. · ACM SIGARCH Computer Architecture News May 2005 139
23 Secure Firmware Updates for Constrained IoT Devices Using Open Standards: A Reality Check Koen Zandberg, Kaspar Schleiser, Francisco Javier Ugalde Acosta et al. · IEEE Access Open access 2019 137
24 Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8 Christopher Pulte, Shaked Flur, Will Deacon et al. · Proceedings of the ACM on Programming Languages Open access 27 Dec 2017 134
25 Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey Santiago Pagani, P. D. Sai Manoj, Axel Jantsch et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25 Oct 2018 133
26 ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS Alasdair Armstrong, Thomas Bauereiß, B. K. Campbell et al. · Proceedings of the ACM on Programming Languages Open access 2 Jan 2019 130
27 Predicting room occupancy with a single passive infrared (PIR) sensor through behavior extraction Yordan P. Raykov, Emre Özer, Ganesh S. Dasika et al. Conference paperOpen access 9 Sep 2016 122
28 A hardwired machine learning processing engine fabricated with submicron metal-oxide thin-film transistors on a flexible substrate Emre Özer, Jedrzej Kufel, James Myers et al. · Nature Electronics Open access 6 Jul 2020 118
29 The limit of dynamic voltage scaling and insomniac dynamic voltage scaling Bo Zhai, David T. Blaauw, Dennis Sylvester et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems Nov 2005 114
30 Tibidabo: Making the case for an ARM-based HPC system Nikola Rajovic, Alejandro Rico, Nikola Puzovic et al. · Future Generation Computer Systems 7 Aug 2013 114
31 Ultra-Low Power 18-Transistor Fully Static Contention-Free Single-Phase Clocked Flip-Flop in 65-nm CMOS Yunpeng Cai, Anand Savanth, Pranay Prabhat et al. · IEEE Journal of Solid-State Circuits Open access 26 Oct 2018 107
32 Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs Matthew J. P. Walker, Stephan Diestelhorst, Andreas Hansson et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Open access 4 May 2016 105
33 Bfloat16 Processing for Neural Networks Neil Burgess, Jelena Milanović, Nigel G. Stephens et al. Conference paper Jun 2019 101
34 From SODA to scotch: The evolution of a wireless baseband processor Mark Woh, Yuan Lin, Sangwon Seo et al. Conference paper Nov 2008 101
35 Simulating DRAM controllers for future system architecture exploration Andreas Hansson, Neha Agarwal, Aasheesh Kolli et al. Conference paper Mar 2014 99
36 Evolution of thread-level parallelism in desktop applications Geoffrey W. Blake, Ronald Dreslinski, Trevor Mudge et al. Conference paper 19 Jun 2010 91
37 SODA: A Low-power Architecture For Software Radio Yuan Lin, Hyunseok Lee, Mark Woh et al. Conference paper 21 Jul 2006 89
38 A Subthreshold ARM Cortex-M0+ Subsystem in 65 nm CMOS for WSN Applications with 14 Power Domains, 10T SRAM, and Integrated Voltage Regulator James Myers, Anand Savanth, Rohan Gaddh et al. · IEEE Journal of Solid-State Circuits 2 Oct 2015 87
39 Modeling Spiking Neural Networks on SpiNNaker Xin Jin, Mikel Luján, Luis A. Plana et al. · Computing in Science & Engineering Sep 2010 86
40 AnySP Mark Woh, Sangwon Seo, Scott A. Mahlke et al. Conference paper 20 Jun 2009 81
41 Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1 Hanno Becker, Vincent Shang-Shouq Hwang, Matthias J. Kannwischer et al. · IACR Transactions on Cryptographic Hardware and Embedded Systems Open access 19 Nov 2021 79
42 Testing reusable IP-a case study P. Harrod Conference paper 20 Jan 2003 78
43 8.1 An 80nW retention 11.7pJ/cycle active subthreshold ARM Cortex-M0+ subsystem in 65nm CMOS for WSN applications James Myers, Anand Savanth, David J J. Howard et al. Conference paper Feb 2015 77
44 Harnessing voltage margins for energy efficiency in multicore CPUs George N. Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou et al. Conference paperOpen access 14 Oct 2017 73
45 SLUDGE TREATMENT AND DRYING REED BED SYSTEMS IN DENMARK Steen Nielsen, N. Willoughby · Water and Environment Journal Dec 2005 73
46 VLSI Architecture for a Reconfigurable Spectrally Efficient FDM Baseband Transmitter Paul N. Whatmough, Marcus R. Perrett, Safa Isam et al. · IEEE Transactions on Circuits and Systems I Regular Papers 14 Feb 2012 70
47 Device and technology implications of the Internet of Things Robert C. Aitken, Vikas Chandra, James Myers et al. Conference paper Jun 2014 67
48 Persistency for synchronization-free regions Vaibhav Gogte, Stephan Diestelhorst, William Wang et al. Conference paperOpen access 11 Jun 2018 65
49 AnySP: Anytime Anywhere Anyway Signal Processing Mark Woh, Sangwon Seo, Scott A. Mahlke et al. · IEEE Micro 2010 64
50 A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation David Bull, Shidhartha Das, Karthik Shivshankar et al. Conference paper Feb 2010 63

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.