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Most cited papers from ASM International (Belgium)

What are the most cited papers from ASM International (Belgium)?

The most cited paper from ASM International (Belgium) is "Strain-induced semiconductor to metal transition in the two-dimensional honeycomb structure of MoS2" (Emilio Scalise, Michel Houssa, Geoffrey Pourtois et al., 2011), with 693 citations. Next come "High-k dielectrics for future generation memory devices (Invited Paper)" (254) and "Influence of the Oxidant on the Chemical and Field-Effect Passivation of Si by ALD Al[sub 2]O[sub 3]" (164).

Showing 50 of 60 papers. Every paper with more than 21 citations is listed.

Most cited papers, sortable by citations and release date
#Paper
1 Strain-induced semiconductor to metal transition in the two-dimensional honeycomb structure of MoS2 Emilio Scalise, Michel Houssa, Geoffrey Pourtois et al. · Nano Research 10 Nov 2011 693
2 High-k dielectrics for future generation memory devices (Invited Paper) J. A. Kittl et al. · Microelectronic Engineering 14 Mar 2009 254
3 Influence of the Oxidant on the Chemical and Field-Effect Passivation of Si by ALD Al[sub 2]O[sub 3] Gijs Dingemans, N. M. Terlinden, Dieter Pierreux et al. · Electrochemical and Solid-State Letters Open access 21 Oct 2010 164
4 Island growth in the atomic layer deposition of zirconium oxide and aluminum oxide on hydrogen-terminated silicon: Growth mode modeling and transmission electron microscopy Riikka L. Puurunen, Wilfried Vandervorst, Wim F. A. Besling et al. · Journal of Applied Physics 28 Oct 2004 160
5 Plasma-Assisted ALD for the Conformal Deposition of SiO2: Process, Material and Electronic Properties Gijs Dingemans, Cristian A. A. van Helvoirt, Dieter Pierreux et al. · Journal of The Electrochemical Society Open access 2012 147
6 Batch ALD: Characteristics, comparison with single wafer ALD, and examples Ernst H.A. Granneman, Pamela R. Fischer, Dieter Pierreux et al. · Surface and Coatings Technology 24 May 2007 122
7 Performance and Reliability Features of Advanced Nonvolatile Memories Based on Discrete Traps (Silicon Nanocrystals, SONOS) Barbara DeSalvo, C. Gerardi, R. vanSchaijk et al. · IEEE Transactions on Device and Materials Reliability Sep 2004 89
8 Interpretable Anomaly Prediction: Predicting anomalous behavior in industry 4.0 settings via regularized logistic regression tools Rocco Langone, Alfredo Cuzzocrea, Nikolaos Skantzos · Data & Knowledge Engineering 21 Aug 2020 81
9 How far will silicon nanocrystals push the scaling limits of NVMs technologies? Barbara de Salvo et al. Conference paper 22 Mar 2004 75
10 Diffusion‐Mediated Growth and Size‐Dependent Nanoparticle Reactivity during Ruthenium Atomic Layer Deposition on Dielectric Substrates Job Soethoudt, Fabio Grillo, Esteban A. Marques et al. · Advanced Materials Interfaces Open access 17 Oct 2018 73
11 Correlation of interface states/border traps and threshold voltage shift on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors Tian‐Li Wu, Denis Marcon, Benoit Bakeroot et al. · Applied Physics Letters Open access 31 Aug 2015 70
12 Reduction of the Cell-to-Cell Variability in Hf1-xAlxOyBased RRAM Arrays by Using Program Algorithms Eduardo Pérez, Alessandro Grossi, Cristian Zambelli et al. · IEEE Electron Device Letters Open access 30 Dec 2016 63
13 Time dependent dielectric breakdown (TDDB) evaluation of PE-ALD SiN gate dielectrics on AlGaN/GaN recessed gate D-mode MIS-HEMTs and E-mode MIS-FETs Tian‐Li Wu, Denis Marcon, Brice De Jaeger et al. Conference paper Apr 2015 62
14 Composition influence on the physical and electrical properties of SrxTi1−xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes N. Menou et al. · Journal of Applied Physics Nov 2009 61
15 Atomic Layer Deposition of Strontium Titanate Films Using Sr([sup t]Bu[sub 3]Cp)[sub 2] and Ti(OMe)[sub 4] Mihaela Ioana Popovici, Sven Van Elshocht, N. Menou et al. · Journal of The Electrochemical Society 3 Dec 2009 61
16 High performance La-doped HZO based ferroelectric capacitors by interfacial engineering Mihaela Ioana Popovici, Jasper Bizindavyi, Paola Favia et al. · 2022 International Electron Devices Meeting (IEDM) Conference paperOpen access 3 Dec 2022 57
17 Traps at the SiC/SiO2-Interface Gerhard Pensl, Michael Baßler, Florin Ciobanu et al. · MRS Proceedings 2000 57
18 Material insights of HfO2-based integrated 1-transistor-1-resistor resistive random access memory devices processed by batch atomic layer deposition Gang Niu, Hee‐Dong Kim, Robin Roelofs et al. · Scientific Reports Open access 17 Jun 2016 54
19 Highly tensile strained silicon–carbon alloys epitaxially grown into recessed source drain areas of NMOS devices Matthias Bauer, Vladimir Machkaoutsan, C. Arena · Semiconductor Science and Technology Open access 7 Dec 2006 53
20 Atomic Layer Deposition of Gd-Doped HfO[sub 2] Thin Films Christoph Adelmann, Hilde Tielens, Daan Dewulf et al. · Journal of The Electrochemical Society 2010 53
21 Porogen residues detection in optical properties of low-k dielectrics cured by ultraviolet radiation P. Maršík, Patrick Bernard Verdonck, David De Roest et al. · Thin Solid Films 12 Jan 2010 53
22 Characterization and optimization of porogen-based PECVD deposited extreme low-k materials as a function of UV-cure time Patrick Bernard Verdonck, David De Roest, Shinya Kaneko et al. · Surface and Coatings Technology 4 May 2007 52
23 (Invited) Selective Epitaxial Growth of High-P Si:P for Source/Drain Formation in Advanced Si nFETs Erik Rosseel, Sathish Kumar Dhayalan, Andriy Yakovitch Hikavyy et al. · ECS Transactions Conference paperOpen access 18 Aug 2016 47
24 Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory Geert Van den Bosch, Gouri Sankar Kar, Pieter Blomme et al. · IEEE Electron Device Letters 28 Sep 2011 46
25 Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs Erik Rosseel, Harald Benjamin Profijt, Andriy Yakovitch Hikavyy et al. · ECS Transactions Conference paperOpen access 12 Aug 2014 46
26 Impact of the precursor chemistry and process conditions on the cell-to-cell variability in 1T-1R based HfO2 RRAM devices Alessandro Grossi, Eduardo Pérez, Cristian Zambelli et al. · Scientific Reports Open access 18 Jul 2018 44
27 Development of sub-10-nm atomic layer deposition barriers for Cu/low-k interconnects Gerald Beyer, Alessandra Satta, Jörg Schuhmacher et al. · Microelectronic Engineering Oct 2002 44
28 Fundamentals of Ge 1−x Sn x and Si y Ge 1−x-y Sn x RPCVD epitaxy Joe Margetis, Aboozar Mosleh, Seyed Amir Ghetmiri et al. · Materials Science in Semiconductor Processing 28 Dec 2016 43
29 Influence of porosity on electrical properties of low-k dielectrics Els Van Besien, Marianna Pantouvaki, Larry Zhao et al. · Microelectronic Engineering 21 Apr 2011 42
30 The impact of the gate dielectric quality in developing Au-free D-mode and E-mode recessed gate AlGaN/GaN transistors on a 200mm Si substrate Tian‐Li Wu, Denis Marcon, Brice De Jaeger et al. Conference paperOpen access May 2015 41
31 Impact of Precursor Chemistry and Process Conditions on the Scalability of ALD HfO[sub 2] Gate Dielectrics Johan Swerts, Nick Peys, Laura Nyns et al. · Journal of The Electrochemical Society 3 Dec 2009 39
32 Achieving Conduction Band-Edge Effective Work Functions by $\hbox{La}_{2}\hbox{O}_{3}$ Capping of Hafnium Silicates Lars‐Åke Ragnarsson, Vincent S. Chang, H.Y. Yu et al. · IEEE Electron Device Letters Jun 2007 38
33 Tailoring switching and endurance / retention reliability characteristics of HfO2 / Hf RRAM with Ti, Al, Si dopants Y. Y. Chen, R. Roelofs, A. Redolfi et al. Conference paper Jun 2014 36
34 Si O 2 ∕ Si 3 N 4 ∕ Al 2 O 3 stacks for scaled-down memory devices: Effects of interfaces and thermal annealing Michael Lisiansky, Alexey Heiman, Mark Kovler et al. · Applied Physics Letters 9 Oct 2006 35
35 Low temperature plasma-enhanced ALD enables cost-effective spacer defined double patterning (SDDP) Julien Beynet, Patrick Y. Wong, Andy Miller et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE Conference paper 3 Dec 2009 33
36 Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration Clément Porret, Andriy Yakovitch Hikavyy, Juan Fernando Gomez Granados et al. · ECS Journal of Solid State Science and Technology Open access 2019 32
37 Dipole-First Gate Stack as a Scalable and Thermal Budget Flexible Multi-Vt Solution for Nanosheet/CFET Devices Hiroaki Arimura, Lars‐Åke Ragnarsson, Yusuke Oniki et al. Conference paper 11 Dec 2021 31
38 Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow Niamh Waldron et al. Conference paper Dec 2015 31
39 Strain Enhanced nMOS Using In Situ Doped Embedded $\hbox{Si}_{1 - x}\hbox{C}_{x}$ S/D Stressors With up to 1.5% Substitutional Carbon Content Grown Using a Novel Deposition Process Peter Verheyen, Vladimir Machkaoutsan, Matthias Bauer et al. · IEEE Electron Device Letters 22 Oct 2008 31
40 Standard cell design in N7: EUV vs. immersion Bharani Chava, David del Rio, Yasser Sherazi et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE Conference paper 18 Mar 2015 31
41 Effect of ultraviolet curing wavelength on low-k dielectric material properties and plasma damage resistance P. Maršík, Adam Urbanowicz, Patrick Bernard Verdonck et al. · Thin Solid Films 2 Feb 2011 31
42 A robust k∼2.3 SiCOH low-k film formed by porogen removal with UV-cure Nathan Kemeling, Kiyohiro Matsushita, Naoto Tsuji et al. · Microelectronic Engineering 28 May 2007 30
43 “Zero-charge” SiO2/Al2O3 stacks for the simultaneous passivation of n+ and p+ doped silicon surfaces by atomic layer deposition Bas W. H. van de Loo, Harm C. M. Knoops, Gijs Dingemans et al. · Solar Energy Materials and Solar Cells Open access 23 Oct 2015 29
44 Analysis of performance/variability trade-off in Macaroni-type 3-D NAND memory G. Congedo, Antonio Arreghini, Li Liu et al. Conference paper May 2014 28
45 Processing of MEMS gyroscopes on top of CMOS ICs Ann Witvrouw, Ankit Nalin Mehta, Agnes Verbist et al. Conference paper 30 Aug 2005 28
46 Improved thermal stability of Ni-silicides on Si:C epitaxial layers Vladimir Machkaoutsan, Sofie Mertens, Matthias Bauer et al. · Microelectronic Engineering 28 May 2007 27
47 Epitaxial GeSn: impact of process conditions on material quality Roger Loo, Yosuke Shimura, Shinichi Ike et al. · Semiconductor Science and Technology 20 Sep 2018 26
48 Temperature dependence of frequency dispersion in III–V metal-oxide-semiconductor C-V and the capture/emission process of border traps Abhitosh Vais, H. C. Lin, Chunmeng Dou et al. · Applied Physics Letters Open access 3 Aug 2015 26
49 Multi-project wafer runs for electronic graphene devices in the European 2D-Experimental Pilot Line project Bárbara Canto, Martin Otto, Arantxa Maestre Caro et al. · Nature Communications Open access 6 Feb 2025 25
50 High aspect ratio via metallization for 3D integration using CVD TiN barrier and electrografted Cu seed G. Druais, Gabriela D.M. Dilliway, Pamela R. Fischer et al. · Microelectronic Engineering 18 Jun 2008 25

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.