| 1 |
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
N. Loubet et al.
Conference paper |
Jun 2017 |
1,052 |
| 2 |
Extreme ultraviolet resist materials for sub-7 nm patterning
Li Li, Xuan Liu, Shyam Chand Pal et al. · Chemical Society Reviews
Review |
2017 |
347 |
| 3 |
Progress in the development and understanding of advanced low k and ultralow k dielectrics for very large-scale integrated interconnects—State of the art
A. Grill, S. M. Gates, Todd E. Ryan et al. · Applied Physics Reviews
Open access |
15 Jan 2014 |
295 |
| 4 |
Plasma processing of low-k dielectrics
Mikhaı̈l R. Baklanov, Jean‐François de Marneffe, Denis Shamiryan et al. · Journal of Applied Physics
|
22 Jan 2013 |
294 |
| 5 |
Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures
Ali Razavieh, PETER M. ZEITZOFF, Edward Joseph Nowak · IEEE Transactions on Nanotechnology
|
2019 |
293 |
| 6 |
300-mm Monolithic Silicon Photonics Foundry Technology
Ken Giewont, Shuren Hu, Bo Peng et al. · IEEE Journal of Selected Topics in Quantum Electronics
|
Apr 2019 |
264 |
| 7 |
Mimicking Neurotransmitter Release in Chemical Synapses via Hysteresis Engineering in MoS2 Transistors
Andrew J. Arnold, Ali Razavieh, Joseph R. Nasr et al. · ACS Nano
|
4 Mar 2017 |
264 |
| 8 |
Considerations of Environmentally Relevant Test Conditions for Improved Evaluation of Ecological Hazards of Engineered Nanomaterials
Patricia Ann Holden et al. · Environmental Science & Technology
Open access |
13 May 2016 |
235 |
| 9 |
14nm Ferroelectric FinFET technology with steep subthreshold slope for ultra low power applications
Zoran Krivokapić, Uzma Rana, Rohit V. Galatage et al.
Conference paper |
Dec 2017 |
230 |
| 10 |
A Comprehensive Crossbar Array Model With Solutions for Line Resistance and Nonlinear Device Characteristics
An Chen · IEEE Transactions on Electron Devices
|
20 Mar 2013 |
229 |
| 11 |
Intrinsic optimization using stochastic nanomagnets
Brian Sutton, Kerem Yunus Camsari, Behtash Behin-Aein et al. · Scientific Reports
Open access |
15 Mar 2017 |
227 |
| 12 |
Electrically Tunable Bandgaps in Bilayer MoS 2
Tao Chu, Hesameddin Ilatikhameneh, Gerhard Klimeck et al. · Nano Letters
|
11 Nov 2015 |
220 |
| 13 |
Quality control and authentication of packaged integrated circuits using enhanced-spatial-resolution terahertz time-domain spectroscopy and imaging
Kiarash Ahi, Sina Shahbazmohamadi, Navid Asadizanjani · Optics and Lasers in Engineering
|
26 Jul 2017 |
207 |
| 14 |
Utilizing the Variability of Resistive Random Access Memory to Implement Reconfigurable Physical Unclonable Functions
An Chen · IEEE Electron Device Letters
|
24 Dec 2014 |
203 |
| 15 |
Creation and Control of Two-Dimensional Electron Gas Using Al-Based Amorphous Oxides/SrTiO3 Heterostructures Grown by Atomic Layer Deposition
Sang Woon Lee, Yiqun Liu, Jaeyeong Heo et al. · Nano Letters
Open access |
21 Aug 2012 |
168 |
| 16 |
Magnetic functional heterojunction reactors with 3D specific recognition for selective photocatalysis and synergistic photodegradation in binary antibiotic solutions
Ziyang Lu, Guosheng Zhou, Minshan Song et al. · Journal of Materials Chemistry A
|
2019 |
159 |
| 17 |
SOI thermal impedance extraction methodology and its significance for circuit simulation
Wei Jin, Weidong Liu, S.K.H. Fung et al. · IEEE Transactions on Electron Devices
|
Apr 2001 |
157 |
| 18 |
Variability of resistive switching memories and its impact on crossbar array performance
An Chen, Ming-Ren Lin
Conference paper |
Apr 2011 |
155 |
| 19 |
Development of new 2.5D package with novel integrated organic interposer substrate with ultra-fine wiring and high density bumps
Kiyoshi Oi, Satoshi Otake, Noriyoshi Shimizu et al.
Conference paper |
May 2014 |
148 |
| 20 |
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
Ruijie Xie et al.
Conference paper |
Dec 2016 |
145 |
| 21 |
A 22nm FDSOI Technology Optimized for RF/mmWave Applications
Shao-er Ong et al.
Conference paper |
Jun 2018 |
144 |
| 22 |
Liquid tunable microlenses based on MEMS techniques
Xuefeng Zeng, Hongrui Jiang · Journal of Physics D Applied Physics
Open access |
17 Jul 2013 |
144 |
| 23 |
Mathematical Modeling of THz Point Spread Function and Simulation of THz Imaging Systems
Kiarash Ahi · IEEE Transactions on Terahertz Science and Technology
|
12 Oct 2017 |
143 |
| 24 |
Design of Tunneling Field-Effect Transistors Based on Staggered Heterojunctions for Ultralow-Power Applications
Lingquan Wang, Edward T. Yu, Yuan Taur et al. · IEEE Electron Device Letters
|
14 Apr 2010 |
141 |
| 25 |
Directed self-assembly of block copolymers for 7 nanometre FinFET technology and beyond
Chi‐Chun Liu, Elliott Franke, Yann Mignot et al. · Nature Electronics
|
9 Oct 2018 |
140 |
| 26 |
Scaling Challenges for Advanced CMOS Devices
Ajey P. Jacob, Ruilong Xie, Min Gyu Sung et al. · International Journal of High Speed Electronics and Systems
|
17 Feb 2017 |
132 |
| 27 |
Atomic Layer Deposition of Dielectrics on Graphene Using Reversibly Physisorbed Ozone
Srikar Jandhyala, Greg Mordi, Bongki Lee et al. · ACS Nano
|
21 Feb 2012 |
132 |
| 28 |
GeSn technology: Extending the Ge electronics roadmap
Suyog Gupta, Robert Chen, Blanka Magyari-Köpe et al.
Conference paper |
Dec 2011 |
126 |
| 29 |
An Efficient Mixed Integer Programming Model Based on Timed Petri Nets for Diverse Complex Cluster Tool Scheduling Problems
Chihyun Jung, Tae‐Eog Lee · IEEE Transactions on Semiconductor Manufacturing
|
20 Dec 2011 |
123 |
| 30 |
Non-volatile spin switch for Boolean and non-Boolean logic
Supriyo Datta, Sayeef Salahuddin, Behtash Behin‐Aein · Applied Physics Letters
Open access |
17 Dec 2012 |
121 |
| 31 |
Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire Transistors
Renan Doria Trevisoli, Rodrigo Trevisoli Doria, Michelly S. de Souza et al. · IEEE Transactions on Electron Devices
Open access |
12 Oct 2012 |
120 |
| 32 |
Origin of the endurance degradation in the novel HfO2-based 1T ferroelectric non-volatile memories
Ekaterina Yurchuk, Stefan Mueller, Dominik Martin et al.
Conference paper |
Jun 2014 |
116 |
| 33 |
14-nm FinFET Technology for Analog and RF Applications
Jagar Singh, J. Ciavatti, Kumaran Sundaram et al. · IEEE Transactions on Electron Devices
|
6 Dec 2017 |
114 |
| 34 |
Scheduling Cluster Tools With Ready Time Constraints for Consecutive Small Lots
Hyun-Jung Kim, Jun-Ho Lee, Chihyun Jung et al. · IEEE Transactions on Automation Science and Engineering
|
25 Oct 2012 |
112 |
| 35 |
Mechanism of Co Liner as Enhancement Layer for Cu Interconnect Gap-Fill
Meng‐Dong He, Xingxing Zhang, T. Nogami et al. · Journal of The Electrochemical Society
|
2013 |
111 |
| 36 |
High-Voltage Integrated Circuits: History, State of the Art, and Future Prospects
Don Disney, Ted Letavic, Tanya Trajkovic et al. · IEEE Transactions on Electron Devices
|
4 Jan 2017 |
110 |
| 37 |
In situ observation of electromigration-induced void migration in dual-damascene Cu interconnect structures
Anand V. Vairagar, Subodh G. Mhaisalkar, Ahila Krishnamoorthy et al. · Applied Physics Letters
|
27 Sep 2004 |
108 |
| 38 |
A review of hot-carrier degradation mechanisms in MOSFETs
Alexander Acovic, Giuseppe La Rosa, Yuan-Chen Sun · Microelectronics Reliability
|
Jul 1996 |
108 |
| 39 |
Study of conduction and switching mechanisms in Al/AlOx/WOx/W resistive switching memory for multilevel applications
Ye Zhang, Huaqiang Wu, Yue Bai et al. · Applied Physics Letters
|
10 Jun 2013 |
107 |
| 40 |
Effects of Surfactants in an Electroless Nickel-Plating Bath on the Properties of Ni−P Alloy Deposits
Bing‐Hung Chen, L. Hong, Yue Ma et al. · Industrial & Engineering Chemistry Research
|
30 Apr 2002 |
106 |
| 41 |
45nm CMOS - Silicon Photonics Monolithic Technology (45CLO) for next-generation, low power and high speed optical interconnects
Michał Rakowski et al.
Conference paper |
2020 |
104 |
| 42 |
Half-terahertz operation of SiGe HBTs
Ram Krithivasan, Yuan Lu, John D. Cressler et al. · IEEE Electron Device Letters
|
28 Jun 2006 |
103 |
| 43 |
Channel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet
Chun Wing Yeung et al.
Conference paper |
Dec 2018 |
101 |
| 44 |
A technology-agnostic MTJ SPICE model with user-defined dimensions for STT-MRAM scalability studies
Jong Yeon Kim, An Chen, Behtash Behin‐Aein et al.
Conference paper |
Sep 2015 |
99 |
| 45 |
Reliability studies of vertical GaN devices based on bulk GaN substrates
Isik C. Kizilyalli, Phong Bui-Quang, Don Disney et al. · Microelectronics Reliability
|
16 Jul 2015 |
99 |
| 46 |
Review Article: Recommended reading list of early publications on atomic layer deposition—Outcome of the “Virtual Project on the History of ALD”
Esko Ahvenniemi et al. · Journal of Vacuum Science & Technology A Vacuum Surfaces and Films
Open access |
16 Dec 2016 |
97 |
| 47 |
A Novel Approach to Photonic Packaging Leveraging Existing High-Throughput Microelectronic Facilities
Tymon Barwicz, Yoichi Taira, Ted W. Lichoulas et al. · IEEE Journal of Selected Topics in Quantum Electronics
|
20 Jul 2016 |
96 |
| 48 |
High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
Qianlong Liu et al.
Conference paper |
Dec 2013 |
96 |
| 49 |
Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
Hikaru Kawasaki et al.
Conference paper |
Dec 2009 |
95 |
| 50 |
Modeling Early Breakdown Failures of Gate Oxide in SiC Power MOSFETs
Zakariae Chbili, Asahiko Matsuda, Jaafar Chbili et al. · IEEE Transactions on Electron Devices
|
Sep 2016 |
94 |