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Institution · Renesas Electronics (United States)

Most cited papers from Renesas Electronics (United States)

Renesas Electronics (United States)

What are the most cited papers from Renesas Electronics (United States)?

The most cited paper from Renesas Electronics (United States) is "Developments of Plasma Etching Technology for Fabricating Semiconductor Devices" (Haruhiko Abe, Masahiro Yoneda, Nobuo Fujiwara, 2008), with 324 citations. Next come "Review and future prospects of low-voltage RAM circuits" (163) and "A survey of technical trend of ADAS and autonomous driving" (158).

Showing 50 of 59 papers. Every paper with more than 38 citations is listed.

Most cited papers, sortable by citations and release date
#Paper
1 Developments of Plasma Etching Technology for Fabricating Semiconductor Devices Haruhiko Abe, Masahiro Yoneda, Nobuo Fujiwara · Japanese Journal of Applied Physics Open access Mar 2008 324
2 Review and future prospects of low-voltage RAM circuits Y. Nakagome, Masashi Horiguchi, T. Kawahara et al. · IBM Journal of Research and Development Sep 2003 163
3 A survey of technical trend of ADAS and autonomous driving Ryosuke Okuda, Yuki Kajiwara, Kazuaki Terashima Conference paper Apr 2014 158
4 Fabrication of 4-aminophenol sensor based on hydrothermally prepared ZnO/Yb 2 O 3 nanosheets Mohammed M. Rahman, M. M. Alam, Abdullah Mohamed Asiri et al. · New Journal of Chemistry 2017 155
5 A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits S. Ohbayashi, Makoto Yabuuchi, Koji Nii et al. · IEEE Journal of Solid-State Circuits Apr 2007 152
6 Silicon on thin BOX: a new paradigm of the CMOSFET for low-power and high-performance application featuring wide-range back-bias control Ryuta Tsuchiya, Mayu Horiuchi, S. Kimura et al. Conference paper 19 Apr 2005 144
7 A 27–31-GHz 1024-Element Ka -Band SATCOM Phased-Array Transmitter With 49.5-dBW Peak EIRP, 1-dB AR, and ±70° Beam Scanning Kevin Kai Wei Low, Samet Zihir, Tumay Kanar et al. · IEEE Transactions on Microwave Theory and Techniques 14 Jan 2022 142
8 Statistical characterization of trap position, energy, amplitude and time constants by RTN measurement of multiple individual traps Toshiharu Nagumo, Kiyoshi Takeuchi, Takashi Hase et al. Conference paper Dec 2010 137
9 Low-power embedded SRAM modules with expanded margins for writing Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki et al. Conference paper 30 Aug 2005 136
10 Diffusivity of Cu Ions in Solid Electrolyte and Its Effect on the Performance of Nanometer-Scale Switch Naoki Banno, Toshitsugu Sakamoto, Noriyuki Iguchi et al. · IEEE Transactions on Electron Devices Nov 2008 124
11 Perpendicular Spin Torques in Magnetic Tunnel Junctions Z. Li, S. Zhang, Zhuo Diao et al. · Physical Review Letters 17 Jun 2008 122
12 A 45-nm single-port and dual-port SRAM family with robust read/write stabilizing circuitry under DVFS environment Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto et al. Conference paper Jun 2008 114
13 A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme Takashi Tokairin, Koichi Nose, Koichi Takeda et al. Conference paper Jun 2012 112
14 A 17.7–20.2-GHz 1024-Element K-Band SATCOM Phased-Array Receiver With 8.1-dB/K G/T, ±70° Beam Scanning, and High Transmit Isolation Kevin Kai Wei Low, Tumay Kanar, Samet Zihir et al. · IEEE Transactions on Microwave Theory and Techniques 2 Feb 2022 105
15 A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture Haruhiko Noda, Kazunari Inoue, M. Kuroiwa et al. · IEEE Journal of Solid-State Circuits 2005 103
16 A 256-Element Ku-Band Polarization Agile SATCOM Receive Phased Array With Wide-Angle Scanning and High Polarization Purity Abdurrahman H. Aljuhani, Tumay Kanar, Samet Zihir et al. · IEEE Transactions on Microwave Theory and Techniques 10 Mar 2021 101
17 Spreading Diversity in Multi-cell Neutron-Induced Upsets with Device Scaling Eishi Ibe, Sung Kyu Chung, Shi-Jie Wen et al. Conference paper Sep 2006 99
18 A 300-MHz 25-/spl mu/A/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor Masanao Yamaoka, Yoshihiro Shinozaki, Noriaki Maeda et al. · IEEE Journal of Solid-State Circuits 2005 99
19 High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond Qianlong Liu et al. Conference paper Dec 2013 96
20 Double patterning design split implementation and validation for the 32nm node Martin Drapeau, Vincent I. Wiaux, Eric Hendrickx et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE Conference paper 16 Mar 2007 95
21 A 1024-Element Ku-Band SATCOM Phased-Array Transmitter With 45-dBW Single-Polarization EIRP Gökhan Gültepe, Tumay Kanar, Samet Zihir et al. · IEEE Transactions on Microwave Theory and Techniques 10 May 2021 90
22 Observation and electronic characterization of ‘‘new’’ E′ center defects in technologically relevant thermal SiO2 on Si: An additional complexity in oxide charge trapping John F. Conley, Patrick M. Lenahan, Howard L. Evans et al. · Journal of Applied Physics Sep 1994 90
23 Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node Hideaki Kurata, Kazuo Otsuga, Akira Kotabe et al. · IEEE Journal of Solid-State Circuits Jun 2007 89
24 Analysis and design considerations of a buck converter with a hysteretic PWM controller Takashi Nabeshima, Tomohiko Sato, S. Yoshida et al. · 2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551) Conference paper 30 Nov 2004 88
25 SRAM immunity to cosmic-ray-induced multierrors based on analysis of an induced parasitic bipolar effect Kensuke Osada, Kizashi Yamaguchi, Yu Saitoh et al. · IEEE Journal of Solid-State Circuits May 2004 88
26 A 1024-Element Ku-Band SATCOM Dual-Polarized Receiver With >10-dB/K G/T and Embedded Transmit Rejection Filter Gökhan Gültepe, Tumay Kanar, Samet Zihir et al. · IEEE Transactions on Microwave Theory and Techniques 26 Apr 2021 84
27 Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate Yukinori Morita, Ryuta Tsuchiya, Takashi Ishigaki et al. Conference paper Jun 2008 73
28 A 37–42-GHz 8 × 8 Phased-Array With 48–51-dBm EIRP, 64–QAM 30-Gb/s Data Rates, and EVM Analysis Versus Channel RMS Errors Yusheng Yin, Samet Zihir, Tumay Kanar et al. · IEEE Transactions on Microwave Theory and Techniques 8 Jun 2020 68
29 A Compact Model of Phase-Change Memory Based on Rate Equations of Crystallization and Amorphization K. Sonoda, Atsushi Sakai, Masahiro Moniwa et al. · IEEE Transactions on Electron Devices 16 Jun 2008 67
30 A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations Makoto Yabuuchi, Koji Nii, Yasumasa Tsukamoto et al. Conference paper Feb 2007 66
31 Cognitive Radio RF: Overview and Challenges Van Tam Nguyen, Frederic Villain, Yann Le Guillou · VLSI design Open access 2012 65
32 A 45-nm Bulk CMOS Embedded SRAM With Improved Immunity Against Process and Temperature Variations Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto et al. · IEEE Journal of Solid-State Circuits 2008 64
33 Waveform Engineered Sequential Load Modulated Balanced Amplifier With Continuous Class-F−1 and Class-J Operation Chenhao Chu, Tushar Sharma, Sagar Kumar Dhar et al. · IEEE Transactions on Microwave Theory and Techniques Open access 11 Nov 2021 63
34 A Power Management Scheme Controlling 20 Power Domains for a Single-Chip Mobile Processor Toshihiro Hattori et al. Conference paper 2006 62
35 A 70 dB DR 10 b 0-to-80 MS/s Current-Integrating SAR ADC With Adaptive Dynamic Range Badr Malki, Takaya Yamamoto, Bob Verbruggen et al. · IEEE Journal of Solid-State Circuits 11 Mar 2014 61
36 Low-power embedded ReRAM technology for IoT applications M. Ueki, Kazuhiro Takeuchi, Takashi Yamamoto et al. Conference paper Jun 2015 60
37 A 256-Element Ku-Band Polarization Agile SATCOM Transmit Phased Array With Wide-Scan Angles, Low Cross Polarization, Deep Nulls, and 36.5-dBW EIRP per Polarization Abdurrahman H. Aljuhani, Tumay Kanar, Samet Zihir et al. · IEEE Transactions on Microwave Theory and Techniques 22 Apr 2021 57
38 Optimized Markov Chain Monte Carlo for Signal Detection in MIMO Systems: An Analysis of the Stationary Distribution and Mixing Time Babak Hassibi, Morten Hartvig Hansen, Alexandros G. Dimakis et al. · IEEE Transactions on Signal Processing Open access Jul 2014 55
39 UTBB FDSOI transistors with dual STI for a multi-Vt strategy at 20nm node and below L. Grenouillet et al. Conference paper Dec 2012 55
40 A 40GOPS 250mW massively parallel processor based on matrix architecture Masumi Nakajima, Haruhiko Noda, Katsumi DOSAKA et al. Conference paper 2006 52
41 Calcium borate flame retardation system for epoxy molding compounds Toshiaki Ishii, Hiroyoshi Kokaku, Akira Nagai et al. · Polymer Engineering and Science 24 Apr 2006 52
42 Transistor Mismatch Properties in Deep-Submicrometer CMOS Technologies Xiaobin Yuan, Takashi Shimizu, U. Mahalingam et al. · IEEE Transactions on Electron Devices 21 Jan 2011 50
43 Vertical charge imbalance effect on 600 V-class trench-filling superjunction power MOSFETs Tomohiro Tamaki, Y. Nakazawa, H. Kanai et al. Conference paper May 2011 50
44 Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor Yusuke Kanno, Hiroyuki Mizuno, Yoshihiko Yasu et al. Conference paper 2006 50
45 Thermal and Electrical Performance of Direct Bond Interconnect Technology for 2.5D and 3D Integrated Circuits Akash Deepak Agrawal, Shaowu Huang, Guilian Gao et al. Conference paper May 2017 49
46 A 3-10 GHz bandwidth low-noise and low-power amplifier for full-band UWB communications in 0.25- μm SiGe BiCMOS technology Nobuhiro Shiramizu, Takatsugu Masuda, M. Tanabe et al. Conference paper 10 Aug 2005 48
47 Hierarchical Power Distribution With Power Tree in Dozens of Power Domains for 90-nm Low-Power Multi-CPU SoCs Yusuke Kanno, Hiroyuki Mizuno, Yoshihiko Yasu et al. · IEEE Journal of Solid-State Circuits 2007 45
48 A 45 nm 2-port 8T-SRAM Using Hierarchical Replica Bitline Technique With Immunity From Simultaneous R/W Access Issues Satoshi Ishikura, M. Kurumada, Toshio Terano et al. · IEEE Journal of Solid-State Circuits 28 Mar 2008 45
49 Current Measurement Offset Error Compensation in Vector-Controlled SPMSM Drive Systems Sang-Min Lee, Heonyoung Kim, Kibok Lee · IEEE Journal of Emerging and Selected Topics in Power Electronics 14 Feb 2022 43
50 Stream applications on the dynamically reconfigurable processor Motohiro Suzuki, Yohei Hasegawa, Yutaka YAMADA et al. Conference paper 21 Mar 2005 43

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.