Most cited papers from Synopsys (United States)
What are the most cited papers from Synopsys (United States)?
The most cited paper from Synopsys (United States) is "Efficient implementation of a BDD package" (Karl S. Brace, Richard L. Rudell, Randal E. Bryant, 1990), with 1,082 citations. Next come "Bounded Model Checking" (960) and "Dynamic variable ordering for ordered binary decision diagrams" (849).
Showing 50 of 57 papers. Every paper with more than 114 citations is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | Efficient implementation of a BDD package Karl S. Brace, Richard L. Rudell, Randal E. Bryant | 1990 | 1,082 |
| 2 | Bounded Model Checking Armin Biere, Alessandro Cimatti, Edmund M. Clarke et al. · Advances in computers | 2003 | 960 |
| 3 | Dynamic variable ordering for ordered binary decision diagrams Richard L. Rudell · International Conference on Computer Aided Design | 7 Nov 1993 | 849 |
| 4 | New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation Yu Kevin Cao, Takashi G. Sato, Michael Orshansky et al. | 7 Nov 2002 | 510 |
| 5 | Efficient implementation of a BDD package K.S. Brace, Richard L. Rudell, Randal E. Bryant | 4 Dec 2002 | 452 |
| 6 | Estimation of average switching activity in combinational and sequential circuits Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer et al. | Jul 1992 | 430 |
| 7 | Data and memory optimization techniques for embedded systems Preeti Ranjan Panda, Francky Catthoor, Nikil D. Dutt et al. · ACM Transactions on Design Automation of Electronic Systems | Apr 2001 | 373 |
| 8 | Antiviral Activity and Mechanism of Action of Ganciclovir Thomas R. Matthews, Richard E. Boehme · Clinical Infectious Diseases | Jul 1988 | 369 |
| 9 | Combinational test generation using satisfiability Paul R. Stephan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1996 | 328 |
| 10 | Biophotovoltaics: oxygenic photosynthetic organisms in the world of bioelectrochemical systems Alistair J. McCormick, Paolo Bombelli, Robert W. Bradley et al. · Energy & Environmental Science | 2015 | 310 |
| 11 | LOLA: Runtime Monitoring of Synchronous Systems Ben D'Angelo, Subbayya Sankaranarayanan, César Sánchez et al. | 6 Jul 2005 | 290 |
| 12 | The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 2 Jun 2009 | 286 |
| 13 | An experimental chip to evaluate test techniques experiment results Siyad Ma, P. Franco, Edward J. McCluskey | 19 Nov 2002 | 277 |
| 14 | Freeform spectrometer enabling increased compactness Jacob Reimers, Aaron M. Bauer, Kevin P. Thompson et al. · Light Science & Applications | 27 Feb 2017 | 252 |
| 15 | Hardware-software co-design of embedded reconfigurable architectures Yanbing Li, T. K. Callahan, Ervan Darnell et al. | 2000 | 240 |
| 16 | Mid-wave IR and long-wave IR laser potential of rare-earth doped chalcogenide glass fiber L. Brandon Shaw, Brian J. Cole, Peter A. Thielen et al. · IEEE Journal of Quantum Electronics | 2001 | 228 |
| 17 | On-chip vs. off-chip memory Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Eugen Nicolau · ACM Transactions on Design Automation of Electronic Systems | Jul 2000 | 224 |
| 18 | Modeling the Driving-Point Characteristic of Resistive Interconnect for Accurate Delay Estimation P.R. O'Brien, Thomas L. Savarino | 2003 | 215 |
| 19 | On average power dissipation and random pattern testability of CMOS combinational logic networks Shen, Ghosh, Devadas et al. · IEEE/ACM International Conference on Computer-Aided Design | 1992 | 211 |
| 20 | Power optimization of variable-voltage core-based systems Ingie Hong, Darko Kirovski, Gang Qu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1999 | 198 |
| 21 | Multilevel circuit partitioning Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng | 1997 | 183 |
| 22 | Behavioral synthesis techniques for intellectual property protection Farinaz Koushanfar, Inki Hong, Miodrag Potkonjak · ACM Transactions on Design Automation of Electronic Systems | Jul 2005 | 177 |
| 23 | Crosstalk in VLSI interconnections Ashok Vittal, Liyuan Chen, Malgorzata Marek-Sadowska et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Dec 1999 | 170 |
| 24 | Estimation of power dissipation in CMOS combinational circuits using Boolean function manipulation Srinivas Devadas, Kurt Keutzer, Jacob White · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Mar 1992 | 169 |
| 25 | Experimental analysis of the fastest optimum cycle ratio and mean algorithms Ali Dasdan · ACM Transactions on Design Automation of Electronic Systems | Oct 2004 | 169 |
| 26 | A global wiring paradigm for deep submicron design Dennis Sylvester, Kurt Keutzer · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2000 | 166 |
| 27 | Origin and Control of OFF-State Leakage Current in GaN-on-Si Vertical Diodes Yuhao Zhang, Min Sun, Hiu Yung Wong et al. · IEEE Transactions on Electron Devices | 12 May 2015 | 166 |
| 28 | Temporal partitioning and scheduling data flow graphs for reconfigurable computers Karthikeya M. Gajjala Purna, Dinesh K Bhatia · IEEE Transactions on Computers | Jun 1999 | 163 |
| 29 | Towards a standard for embedded core test: an example Erik Jan Marinissen, Y. Zorian, R. Kapur et al. | 20 Jan 2003 | 162 |
| 30 | A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors Xin Si, Meng‐Fan Chang, Win-San Khwa et al. · IEEE Transactions on Circuits and Systems I Regular Papers | 6 Aug 2019 | 159 |
| 31 | Task scheduling and voltage selection for energy minimization Yumin Zhang, Xiaobo Sharon Hu, D.Z. Chen | 2002 | 157 |
| 32 | Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis Pankaj Chauhan, Edmund M. Clarke, James H. Kukula et al. · Lecture notes in computer science | 2002 | 155 |
| 33 | Planning for performance Ralph H. J. M. Otten, Robert K. Brayton | 1998 | 154 |
| 34 | SAT Based Abstraction-Refinement Using ILP and Machine Learning Techniques Edmund M. Clarke, Anubhav Gupta, James H. Kukula et al. · Lecture notes in computer science | 2002 | 147 |
| 35 | Gate sizing for constrained delay/power/area optimization Olivier Coudert · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Dec 1997 | 146 |
| 36 | Backstepping control of linear time-varying systems with known and unknown parameters Youping Zhang, Barış Fi̇dan, Pétros Ioannou · IEEE Transactions on Automatic Control | Nov 2003 | 145 |
| 37 | Estimating routing congestion using probabilistic analysis Jinan Lou, Shankar Krishnamoorthy, Henry Sheng | Apr 2001 | 143 |
| 38 | A gated clock scheme for low power scan testing of logic ICs or embedded cores Yannick Bonhomme, Patrick Girard, L. Guiller et al. | 14 Nov 2002 | 141 |
| 39 | Algorithms for synthesis of hazard-free asynchronous circuits Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli | 1991 | 134 |
| 40 | A new nano-electro-mechanical field effect transistor (NEMFET) design for low-power electronics Hei Kam, D.T. Lee, Roger T. Howe et al. | 6 Apr 2006 | 132 |
| 41 | On solving covering problems Olivier Coudert | 1996 | 132 |
| 42 | Storage assignment to decrease code size Stan Liao, Srinivas Devadas, Kurt Keutzer et al. | Jun 1995 | 131 |
| 43 | Mars Climate Sounder Observation of Mars' 2018 Global Dust Storm D. M. Kass, John T. Schofield, A. Kleinböhl et al. · Geophysical Research Letters | 12 Sep 2019 | 130 |
| 44 | A Digital Clock and Data Recovery Architecture for Multi-Gigabit/s Binary Links J.L. Sonntag, John T. Stonick · IEEE Journal of Solid-State Circuits | 26 Jul 2006 | 130 |
| 45 | Performanace and reliability analysis of 3D-integration structures employing Through Silicon Via (TSV) Aditya P. Karmarkar, Xiaopeng Xu, Victor Moroz | 2009 | 128 |
| 46 | ATK-ForceField: a new generation molecular dynamics software package Julian Schneider, Jan Hamaekers, Samuel T Chill et al. · Modelling and Simulation in Materials Science and Engineering | 29 Sep 2017 | 126 |
| 47 | Acacia+, a Tool for LTL Synthesis Aaron Bohy, Véronique Bruyère, Emmanuel Filiot et al. · Lecture notes in computer science | 2012 | 126 |
| 48 | Global routing with crosstalk constraints Hai Ming Zhou, Martin D. F. Wong | 1998 | 125 |
| 49 | Layout Decomposition Approaches for Double Patterning Lithography Andrew B. Kahng, Chul‐Hong Park, Xu Xu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 28 May 2010 | 124 |
| 50 | An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization Ahmet F. Budak, Miguel Gandara, Wei Shi et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 18 May 2021 | 123 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.