Most cited papers from Xilinx (United States)
What are the most cited papers from Xilinx (United States)?
The most cited paper from Xilinx (United States) is "Experiment-Driven Characterization of Full-Duplex Wireless Systems" (Melissa Duarte, Chris Dick, Ashutosh Sabharwal, 2012), with 1,479 citations. Next come "HotSpot: a compact thermal modeling methodology for early-stage VLSI design" (1,116) and "FINN" (1,059).
Showing 50 of 59 papers. Every paper with more than 107 citations is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | Experiment-Driven Characterization of Full-Duplex Wireless Systems Melissa Duarte, Chris Dick, Ashutosh Sabharwal · IEEE Transactions on Wireless Communications | 14 Nov 2012 | 1,479 |
| 2 | HotSpot: a compact thermal modeling methodology for early-stage VLSI design Wei Huang, Sudeep Ghosh, S. Velusamy et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | May 2006 | 1,116 |
| 3 | FINN Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella et al. | 2 Feb 2017 | 1,059 |
| 4 | High-Level Synthesis for FPGAs: From Prototyping to Deployment Jason Cong, Bin Liu, Stephen Neuendorffer et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 22 Mar 2011 | 849 |
| 5 | Checking Safety Properties Using Induction and a SAT-Solver Mary Sheeran, Satnam Singh, Gunnar Stålmarck · Lecture notes in computer science | 2000 | 724 |
| 6 | MLPerf Inference Benchmark Vijay Janapa Reddi et al. | May 2020 | 517 |
| 7 | FINN- R Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser et al. · ACM Transactions on Reconfigurable Technology and Systems | 30 Sep 2018 | 437 |
| 8 | Large-Scale MIMO Detection for 3GPP LTE: Algorithms and FPGA Implementations Michael Wu, Bei Yin, Guohui Wang et al. · IEEE Journal of Selected Topics in Signal Processing | 21 Mar 2014 | 416 |
| 9 | A time-multiplexed FPGA Stephen Trimberger, D. Carberry, Anju P. Johnson et al. | 22 Nov 2002 | 400 |
| 10 | Dynamic power consumption in Virtex™-II FPGA family Li Shang, Alireza S. Kaviani, Kusuma Bathala | 24 Feb 2002 | 394 |
| 11 | Lava Per Bjesse, Koen Claessen, Mary Sheeran et al. | 29 Sep 1998 | 375 |
| 12 | PicoRadios for wireless sensor networks: the next challenge in ultra-low power design Jan M. Rabaey, J. Ammer, Tufan Coşkun Karalar et al. · 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) | 25 Jun 2003 | 363 |
| 13 | Synthesis of high-performance analog circuits in ASTRX/OBLX Emil S. Ochotta, Rob A. Rutenbar, Larry Richard Carley · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Mar 1996 | 327 |
| 14 | GA4GH: International policies and standards for data sharing across genomic research and healthcare Heidi L. Rehm et al. · Cell Genomics | Nov 2021 | 325 |
| 15 | Invited Paper: Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs Patrick S. Lysaght, Brandon J. Blodget, Jeff Mason et al. | Aug 2006 | 271 |
| 16 | Empowering full-duplex wireless communication by exploiting directional diversity Evan Everett, Melissa Duarte, Chris Dick et al. | Nov 2011 | 249 |
| 17 | On the Impact of Phase Noise on Active Cancelation in Wireless Full-Duplex Achaleshwar Sahai, Gaurav P. Patel, Chris Dick et al. · IEEE Transactions on Vehicular Technology | 5 Jun 2013 | 227 |
| 18 | Three Ages of FPGAs: A Retrospective on the First Thirty Years of FPGA Technology Stephen Trimberger · Proceedings of the IEEE | Mar 2015 | 214 |
| 19 | The rosetta experiment: atmospheric soft error rate testing in differing technology FPGAs Austin Lesea, Saar Drimer, J. Fabula et al. · IEEE Transactions on Device and Materials Reliability | Sep 2005 | 202 |
| 20 | Context-Aware Security for 6G Wireless: The Role of Physical Layer Security Arsenia Chorti, André Noll Barreto, Stefan Köpsell et al. · IEEE Communications Standards Magazine | Mar 2022 | 184 |
| 21 | FPGA HLS Today: Successes, Challenges, and Opportunities Jason Cong, Jason Lau, Gai Liu et al. · ACM Transactions on Reconfigurable Technology and Systems | 21 Apr 2022 | 183 |
| 22 | Single wafer encapsulation of mems devices Rob N. Candler, Woo‐Tae Park, King Ho Holden Li et al. · IEEE Transactions on Advanced Packaging | Aug 2003 | 182 |
| 23 | Advanced reliability study of TSV interposers and interconnects for the 28nm technology FPGA Bahareh Banijamali, Suresh Ramalingam, K. V. Nagarajan et al. | May 2011 | 182 |
| 24 | Performance of the Spreeta 2000 integrated surface plasmon resonance affinity sensor Timothy M. Chinowsky, John G. Quinn, Dwight U. Bartholomew et al. · Sensors and Actuators B Chemical | 13 May 2003 | 182 |
| 25 | A Self-reconfiguring Platform Brandon J. Blodget, Philip B. James-Roxby, Eric R. Keller et al. · Lecture notes in computer science | 2003 | 182 |
| 26 | DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement Yibo Lin, Zixuan Jiang, Jiaqi Gu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 22 Jun 2020 | 176 |
| 27 | JBits: Java based interface for reconfigurable computing Steve Guccione, Delon Levi, Prasanna Sundararajan | 1999 | 175 |
| 28 | Approximate matrix inversion for high-throughput data detection in the large-scale MIMO uplink Michael Wu, Bei Yin, Aida Vosoughi et al. | May 2013 | 173 |
| 29 | A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET Yohan Frans, Jaewook Shin, Lei Zhou et al. · IEEE Journal of Solid-State Circuits | 9 Jan 2017 | 170 |
| 30 | Modular dynamic reconfiguration in Virtex FPGAs Pete Sedcole, Brandon J. Blodget, Tobias Becker et al. · IEE Proceedings - Computers and Digital Techniques | 2006 | 166 |
| 31 | Leakage power analysis of a 90nm FPGA Tim Tuan, B. Lai | 24 Jan 2004 | 165 |
| 32 | The effect of iron deficiency and anaemia on women’s health Charlotte S Benson, Akshay Shah, Simon J. Stanworth et al. · Anaesthesia | 7 Mar 2021 | 161 |
| 33 | Radiation-induced multi-bit upsets in SRAM-based FPGAs Heather Quinn, Paul Graham, Jim Krone et al. · IEEE Transactions on Nuclear Science | Dec 2005 | 160 |
| 34 | FPGA Security: Motivations, Features, and Applications Stephen Trimberger, Jason Moore · Proceedings of the IEEE | 18 Jul 2014 | 158 |
| 35 | MOSFET Modeling for RF IC Design Y. Cheng, M. Jamal Deen, C.-H. Chen · IEEE Transactions on Electron Devices | 28 Jun 2005 | 155 |
| 36 | FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm Marjan Karkooti, Joseph R. Cavallaro, C. Dick | 22 Mar 2006 | 154 |
| 37 | Xilinx Adaptive Compute Acceleration Platform Brian Gaide, Dinesh Gaitonde, Chirag Ravishankar et al. | 20 Feb 2019 | 151 |
| 38 | Assembly and reliability challenges in 3D integration of 28nm FPGA die on a large high density 65nm passive interposer Raghunandan Chaware, K. V. Nagarajan, Suresh Ramalingam | May 2012 | 142 |
| 39 | Reducing leakage energy in FPGAs using region-constrained placement Aman Gayasen, Y.-F. Tsai, N. Vijaykrishnan et al. | 22 Feb 2004 | 141 |
| 40 | Transaction level modeling Adam Donlin | 2004 | 140 |
| 41 | Effectiveness of Internal Versus External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis Melanie D. Berg, Christian F. Poivey, David Petrick et al. · IEEE Transactions on Nuclear Science | Aug 2008 | 138 |
| 42 | A High-Performance CNN Processor Based on FPGA for MobileNets Di Wu, Yu Zhang, Xijie Jia et al. | Sep 2019 | 135 |
| 43 | A 90-nm Low-Power FPGA for Battery-Powered Applications Tim Tuan, Arif Rahman, Satyaki Das et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 23 Jan 2007 | 130 |
| 44 | A fault injection analysis of Virtex FPGA TMR design methodology Fernanda Lima, Carl Carmichael, J. Fabula et al. | 25 Aug 2005 | 129 |
| 45 | A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET Jay Im et al. · IEEE Journal of Solid-State Circuits | 25 Sep 2020 | 126 |
| 46 | Low-voltage low-power LVDS drivers Mingdeng Chen, José Silva-Martínez, M. Nix et al. · IEEE Journal of Solid-State Circuits | 31 Jan 2005 | 126 |
| 47 | Interposer design optimization for high frequency signal transmission in passive and active interposer using through silicon via (TSV) Nam‐Hoon Kim, Daniel Wu, Dong‐Wook Kim et al. | May 2011 | 121 |
| 48 | A hybrid ASIC and FPGA architecture Paul S. Zuchowski, Christopher B. Reynolds, Richard J. Grupp et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design | 2002 | 119 |
| 49 | The P4->NetFPGA Workflow for Line-Rate Packet Processing Stephen Ibanez, Gordon Brebner, Nick McKeown et al. | 20 Feb 2019 | 118 |
| 50 | Xilinx Improves Its Semiconductor Supply Chain Using Product and Process Postponement Alexander O. Brown, Hau L. Lee, Raja Petrakian · INFORMS Journal on Applied Analytics | Aug 2000 | 118 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.