Most cited papers from Foxnum Technology (Taiwan)
What are the most cited papers from Foxnum Technology (Taiwan)?
The most cited paper from Foxnum Technology (Taiwan) is "A Cooperative Imbalance Compensation Method for Distributed-Generation Interface Converters" (Po-Tai Cheng, Chien‐An Chen, Tzung‐Lin Lee et al., 2009), with 257 citations. Next come "A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation" (117) and "High-Performance Stacked Double-Layer N-Channel Poly-Si Nanosheet Multigate Thin-Film Transistors" (26).
Showing 24 of 24 papers. Every paper is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | A Cooperative Imbalance Compensation Method for Distributed-Generation Interface Converters Po-Tai Cheng, Chien‐An Chen, Tzung‐Lin Lee et al. · IEEE Transactions on Industry Applications | Mar 2009 | 257 |
| 2 | A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation Po‐Hsun Huang, Hongchin Lin, Y.-T. Lin · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing | Sep 2006 | 117 |
| 3 | High-Performance Stacked Double-Layer N-Channel Poly-Si Nanosheet Multigate Thin-Film Transistors Lun-Chun Chen, Yu-Ru Lin, Yu-Shuo Chang et al. · IEEE Electron Device Letters | 11 Jul 2017 | 26 |
| 4 | Tracking control for a synchronized dual parallel linear motor machine tool S-L Chen, W-M Lin, T-H Chang · Proceedings of the Institution of Mechanical Engineers Part I Journal of Systems and Control Engineering | 13 Nov 2008 | 20 |
| 5 | The physical analysis on electrical junction of junctionless FET Lun-Chun Chen, Mu-Shih Yeh, Yu-Ru Lin et al. · AIP Advances | Feb 2017 | 17 |
| 6 | Junctionless Poly-Si Nanowire FET With Gated Raised S/D Lun-Chun Chen, Mu-Shih Yeh, Ko‐Wei Lin et al. · IEEE Journal of the Electron Devices Society | 4 Jan 2016 | 17 |
| 7 | A Study of Self-Aligned Nitride Erasable OTP Cell by 45-nm CMOS Fully Compatible Process Chia-En Huang, Ying-Je Chen, Han-Chao Lai et al. · IEEE Transactions on Electron Devices | 15 Apr 2009 | 17 |
| 8 | NeoFlash - True Logic Single Poly Flash Memory Technology H.M. Lee, S. T. Woo, H.M. Chen et al. | 25 May 2006 | 15 |
| 9 | A novel high-speed sense amplifier for Bi-NOR flash memories Chiu-Chiao Chung, Hongchin Lin, Yen-Tai Lin · IEEE Journal of Solid-State Circuits | 31 Jan 2005 | 13 |
| 10 | 45nm Gateless Anti-Fuse Cell with CMOS Fully Compatible Process Yi-Hung Tsai, Hsin-Ming Chen, Hsin‐Yi Chiu et al. | Dec 2007 | 11 |
| 11 | Quantum Tunneling PUF: A Chip Fingerprint for Hardware Security Kai-Hsin Chuang, Hsin-Ming Chen, Meng-Yi Wu et al. | 19 Apr 2021 | 10 |
| 12 | Neobit/sup /spl reg// - high reliable logic non-volatile memory (NVM) R.S.C. Wang, Rick Shih-Jye Shen, C.C.-H. Hsu | 26 Oct 2004 | 10 |
| 13 | Low-cost embedded Flash memory technology Wein‐Town Sun, Cheng-Jye Liu, Chun‐Yuan Lo et al. | May 2011 | 9 |
| 14 | A New CMOS Logic Anti-Fuse Cell with Programmable Contact Chia-En Huang, Hsin‐Ming Chen, May-Be Chen et al. | Aug 2007 | 9 |
| 15 | A Novel 2-Bit/Cell p-Channel Logic Programmable Cell With Pure 90-nm CMOS Technology Ying-Je Chen, Chia-En Huang, Hsin‐Ming Chen et al. · IEEE Electron Device Letters | 29 Jul 2008 | 8 |
| 16 | Highly scalable ballistic injection AND-type (BiAND) flash memory Meng-Yi Wu, Sheng-Huei Dai, Shu‐Fen Hu et al. · IEEE Transactions on Electron Devices | 22 Dec 2005 | 7 |
| 17 | ESD Avoiding Circuits for Solving OTP Memory Falsely Programmed Issues Shao-Chang Huang, Ke‐Horng Chen, Hsin-Ming Chen et al. · IEEE Circuits and Systems Magazine | 2010 | 7 |
| 18 | Flash Memory Built-In Self-Diagnosis with Test Mode Control Jen-Chieh Yeh, Yanting Lai, Yuan-Yuan Shih et al. | 28 Jul 2005 | 7 |
| 19 | Embedded I/O PAD Circuit Design for OTP Memory Power-Switch Functionality Shao-Chang Huang, Ke‐Horng Chen, Weiyao Lin et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 16 Feb 2011 | 3 |
| 20 | High-Coverage DfT and Reliability Enhancements for Automotive Floating Gate OTP Beyond AEC-Q100 Hans Martin von Staudt, Franz Schuler, Rohitaswa Bhattacharya et al. | Sep 2022 | 2 |
| 21 | A new dual pumping circuit without body effects for low supply voltage Ming-Chih Hsieh, Zhenghong Wang, Hongchin Lin et al. | 4 Oct 2004 | 2 |
| 22 | Highly reliable anti-fuse technology in sub-16nm technologies for security applications Rick Shih-Jye Shen, Hsin-Ming Chen, Meng-Yi Wu | Jun 2016 | 1 |
| 23 | P-channel SONOS Transient Current Modeling for Program and Erase Pei-Ying Penny Du, Jyh-Chyurn Guo, H.m. Lee et al. · Proceedings of the International Power Modulator Symposium and High Voltage Workshop/Proceedings of the ... International Power Modulator Symposium and ... High Voltage Workshop | Apr 2006 | 0 |
| 24 | An area-efficient CMOS band-gap reference circuit for low supply voltages Hongchin Lin, Wu-Chang Chang, Yen-Tai Lin | 25 Jun 2003 | 0 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.