Most cited papers from Synopsys (Switzerland)

Synopsys (Switzerland)

What are the most cited papers from Synopsys (Switzerland)?

The most cited paper from Synopsys (Switzerland) is "Efficient implementation of a BDD package" (Karl S. Brace, Richard L. Rudell, Randal E. Bryant, 1990), with 1,082 citations. Next come "Bounded Model Checking" (960) and "User Data Privacy: Facebook, Cambridge Analytica, and Privacy Protection" (713).

Published TypeFieldAccessAuthorsCitations

Showing 50 of 59 papers. Every paper with more than 79 citations is listed.

Most cited papers, sortable by citations and release date
#	Paper
1	Efficient implementation of a BDD package Karl S. Brace, Richard L. Rudell, Randal E. Bryant Conference paperOpen access	1990	1,082
2	Bounded Model Checking Armin Biere, Alessandro Cimatti, Edmund M. Clarke et al. · Advances in computers Book chapter	2003	960
3	User Data Privacy: Facebook, Cambridge Analytica, and Privacy Protection Jim Isaak, Mina J. Hanna · Computer	Aug 2018	713
4	Anton 2: Raising the Bar for Performance and Programmability in a Special-Purpose Molecular Dynamics Supercomputer David Elliot Shaw et al. Conference paper	Nov 2014	696
5	Bounded Model Checking Using Satisfiability Solving Edmund M. Clarke, Armin Biere, Richard Raimi et al. · Formal Methods in System Design	Jul 2001	692
6	MLPerf Inference Benchmark Vijay Janapa Reddi et al. Conference paper	May 2020	517
7	Data and memory optimization techniques for embedded systems Preeti Ranjan Panda, Francky Catthoor, Nikil D. Dutt et al. · ACM Transactions on Design Automation of Electronic Systems	Apr 2001	373
8	Task scheduling and voltage selection for energy minimization Yumin Zhang, Xiaobo Sharon Hu, Danny Z. Chen · Proceedings - ACM IEEE Design Automation Conference Conference paper	2002	344
9	The EPFL Combinational Benchmark Suite Luca Amarù, Pierre‐Emmanuel Gaillardon, Testa, Eleonora et al. · Infoscience (Ecole Polytechnique Fédérale de Lausanne) Conference paperOpen access	19 Feb 2019	290
10	On-chip vs. off-chip memory Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Eugen Nicolau · ACM Transactions on Design Automation of Electronic Systems Open access	Jul 2000	224
11	Multilevel circuit partitioning Charles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng Conference paperOpen access	1997	183
12	Behavioral synthesis techniques for intellectual property protection Farinaz Koushanfar, Inki Hong, Miodrag Potkonjak · ACM Transactions on Design Automation of Electronic Systems	Jul 2005	177
13	Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management Changyun Zhu, Zhenyu Gu, Li Shang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	24 Jul 2008	171
14	A simulation model for the density of states and for incomplete ionization in crystalline silicon. I. Establishing the model in Si:P Pietro P. Altermatt, Andreas Schenk, Gernot Heiser · Journal of Applied Physics Open access	Dec 2006	171
15	Experimental analysis of the fastest optimum cycle ratio and mean algorithms Ali Dasdan · ACM Transactions on Design Automation of Electronic Systems	Oct 2004	169
16	Temporal partitioning and scheduling data flow graphs for reconfigurable computers Karthikeya M. Gajjala Purna, Dinesh K Bhatia · IEEE Transactions on Computers	Jun 1999	163
17	Towards a standard for embedded core test: an example Erik Jan Marinissen, Y. Zorian, R. Kapur et al. Conference paper	20 Jan 2003	162
18	OCAMS: The OSIRIS-REx Camera Suite B. Rizk et al. · Space Science Reviews Open access	3 Jan 2018	156
19	Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis Pankaj Chauhan, Edmund M. Clarke, James H. Kukula et al. · Lecture notes in computer science Conference paper	2002	155
20	Gate sizing for constrained delay/power/area optimization Olivier Coudert · IEEE Transactions on Very Large Scale Integration (VLSI) Systems	Dec 1997	146
21	Backstepping control of linear time-varying systems with known and unknown parameters Youping Zhang, Barış Fi̇dan, Pétros Ioannou · IEEE Transactions on Automatic Control	Nov 2003	145
22	A simulation model for the density of states and for incomplete ionization in crystalline silicon. II. Investigation of Si:As and Si:B and usage in device simulation Pietro P. Altermatt, Andreas Schenk, Bernhard Schmithüsen et al. · Journal of Applied Physics Open access	Dec 2006	139
23	Estimating routing congestion using probabilistic analysis Jinan Lou, Suhana Thakur, Shankar Krishnamoorthy et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	2002	137
24	Algorithms for synthesis of hazard-free asynchronous circuits Luciano Lavagno, Kurt Keutzer, Alberto L. Sangiovanni-Vincentelli Conference paper	1991	134
25	Coverage estimation for symbolic model checking Yatin Hoskote, Timothy Kam, Pei-Hsin Ho et al. Conference paperOpen access	Jun 1999	132
26	Storage assignment to decrease code size Stan Liao, Srinivas Devadas, Kurt Keutzer et al. Conference paper	Jun 1995	131
27	Mars Climate Sounder Observation of Mars' 2018 Global Dust Storm D. M. Kass, John T. Schofield, A. Kleinböhl et al. · Geophysical Research Letters	12 Sep 2019	130
28	Numerical simulation of tunnel diodes for multi‐junction solar cells Martin Hermle, G. Létay, Simon P. Philipps et al. · Progress in Photovoltaics Research and Applications	19 Mar 2008	128
29	Acacia+, a Tool for LTL Synthesis Aaron Bohy, Véronique Bruyère, Emmanuel Filiot et al. · Lecture notes in computer science Conference paper	2012	126
30	Smart simulation using collaborative formal and simulation engines Pei Hsin Ho, Thomas R. Shiple, Kevin Harer et al.	5 Nov 2000	125
31	Force Field Development from Periodic Density Functional Theory Calculations for Gas Separation Applications Using Metal–Organic Frameworks Rocío Mercado, Bess Vlaisavljevich, Li‐Chiang Lin et al. · The Journal of Physical Chemistry C Open access	25 May 2016	121
32	On IEEE P1500's Standard for Embedded Core Test Erik Jan Marinissen, Rohit Kapur, M. Lousberg et al. · Journal of Electronic Testing	Aug 2002	121
33	Optimizing Thermal Sensor Allocation for Microprocessors Seda Öǧrenci Memik, Rajarshi Mukherjee, Min Na Ni et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	21 Feb 2008	118
34	Methodology for hardware/software co-verification in C/C++ Luc Séméria, Abhijit Ghosh Conference paper	7 Nov 2002	116
35	Statistical timing analysis of combinational logic circuits H.-F. Jyu, Sharad Malik, Srinivas Devadas et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems	Jun 1993	113
36	Speed binning with path delay test in 150-nm technology Bruce Cory, R. Kapur, B. Underwood · IEEE Design & Test of Computers	Sep 2003	112
37	An efficient implementation of reactivity for modeling hardware in the scenic design environment Stan Liao, Steve Tjiang, Rajesh K. Gupta Conference paper	1997	112
38	A mixed-mode esd protection circuit simulation-design methodology Haigang Feng, Guang Chen, Rouying Zhan et al. · IEEE Journal of Solid-State Circuits	Jun 2003	104
39	An observability-based code coverage metric for functional simulation Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer	10 Nov 1996	101
40	Augmenting loop tiling with data alignment for improved cache performance Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt et al. · IEEE Transactions on Computers	1999	101
41	Pattern generation for delay testing and dynamic timing analysis considering power-supply noise effects A. Krstić, Yimin Jiang, Kwang-Ting Tim Cheng · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	Mar 2001	99
42	Scheduling techniques to enable power management Jose Carlos Monteiro, Srinivas Devadas, Pranav N Ashar et al. Conference paperOpen access	1996	99
43	7-nm FinFET CMOS Design Enabled by Stress Engineering Using Si, Ge, and Sn Suyog Gupta, Victor Moroz, Lee Smith et al. · IEEE Transactions on Electron Devices	Apr 2014	99
44	Low-power memory mapping through reducing address bus activity Preeti Ranjan Panda, Nikil D. Dutt · IEEE Transactions on Very Large Scale Integration (VLSI) Systems	Sep 1999	97
45	Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP Meikang Qiu, Edwin H.‐M. Sha, Meilin Liu et al. · Journal of Parallel and Distributed Computing	Dec 2007	96
46	DAG-aware circuit compression for formal verification Per Bjesse, Arne Borälv Conference paper	22 Feb 2005	94
47	Accurate process-hotspot detection using critical design rule extraction Yen‐Ting Yu, Ya-Chung Chan, Subarna Sinha et al. Conference paper	31 May 2012	90
48	Logic synthesis for engineering change Chih-Chang Lin, Kuang-Chien Chen, Shih-Chieh Chang et al. Conference paper	1995	87
49	A Performance Study of BDD-Based Model Checking Bwolen Yang, Randal E. Bryant, David R. O’Hallaron et al. · Lecture notes in computer science Conference paperOpen access	1998	87
50	Static scheduling and code generation from dynamic dataflow graphs with integer-valued control streams Joseph T. Buck Conference paper	17 Dec 2002	86

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.