Electrostatic Discharge in Electronics
Electrostatic Discharge in Electronics is a research topic within Electrical and Electronic Engineering. Science Explorer counts 21k research works in it since 1950. 9.9% of them reached the world's top 10% most cited for their field and year.
This cluster of papers focuses on the design, analysis, and modeling of electrostatic discharge (ESD) protection in integrated circuits, particularly in CMOS technology. It covers topics such as SCR devices, LDMOS design, RF ESD protection, TLP calibration, high-voltage ESD solutions, and latchup immunity. The papers also discuss on-chip protection strategies and system-level ESD testing.
- ESD Protection
- CMOS Technology
- SCR Devices
- LDMOS Design
- RF ESD
- TLP Calibration
- High-Voltage ESD
- Latchup Immunity
- On-Chip Protection
- System-Level ESD Test
- Research works
- 21k fractional, since 1950
- In the world top 10%
- 2.1k per year above
- Top-10% rate
- 9.9% share of its works in the world top 10%
- Growth, 2018-21 → 2022-25
- -4% the tick is no change
- Largest producer
China
39% of the 10 largest, 2022-now
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