Most cited papers in Low-power high-performance VLSI design
What are the most cited papers in Low-power high-performance VLSI design?
The most cited paper in Low-power high-performance VLSI design is "Graph-Based Algorithms for Boolean Function Manipulation" (Bryant, 1986), with 8,956 citations. Next come "Wattch" (2,588) and "McPAT" (2,386).
Showing 50 of 99 papers. Every paper with more than 659 citations is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | Graph-Based Algorithms for Boolean Function Manipulation Bryant · IEEE Transactions on Computers | Aug 1986 | 8,956 |
| 2 | Wattch David M. Brooks, Vivek Tiwari, Margaret Martonosi | 2000 | 2,588 |
| 3 | McPAT Sheng Li, Jung Ho Ahn, Richard D. Strong et al. | 12 Dec 2009 | 2,386 |
| 4 | Electronic spin transport and spin precession in single graphene layers at room temperature Nikolaos Tombros, C. Józsa, M. Popinciuc et al. · Nature | 15 Jul 2007 | 2,383 |
| 5 | Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits Kaushik Roy, Subhas Chandra Mukhopadhyay, Hamid Mahmoodi · Proceedings of the IEEE | Feb 2003 | 2,369 |
| 6 | Low-Power CMOS Digital Design Anantha P. Chandrakasan, Samuel Sheng, R.W. Brodersen | 17 Jun 2015 | 2,225 |
| 7 | 1.1 Computing's energy problem (and what we can do about it) Mark Horowitz | Feb 2014 | 2,069 |
| 8 | Asymptotic waveform evaluation for timing analysis Lawrence T. Pillage, R.A. Rohrer · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Apr 1990 | 1,877 |
| 9 | A Suggestion for a Fast Multiplier Christopher S. Wallace · IEEE Transactions on Electronic Computers | Feb 1964 | 1,816 |
| 10 | MiBench: A free, commercially representative embedded benchmark suite Matthew R. Guthaus, Jeffrey Ringenberg, Daniel J. Ernst et al. | 25 Aug 2005 | 1,583 |
| 11 | The modified nodal approach to network analysis Chung-Wen Ho, Albert E. Ruehli, P.A. Brennan · IEEE Transactions on Circuits and Systems | Jun 1975 | 1,549 |
| 12 | PRIMA: passive reduced-order interconnect macromodeling algorithm Altan Odabasioglu, M. Celik, Lawrence T. Pileggi · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1998 | 1,467 |
| 13 | Modeling the effect of technology trends on the soft error rate of combinational logic Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler et al. | 25 Jun 2003 | 1,452 |
| 14 | The future of wires R. Ho, Ken Mai, Mark Horowitz · Proceedings of the IEEE | Apr 2001 | 1,441 |
| 15 | Static-noise margin analysis of MOS SRAM cells Evert Seevinck, F.J. List, J. Lohstroh · IEEE Journal of Solid-State Circuits | Oct 1987 | 1,438 |
| 16 | A general unified approach to modelling switching-converter power stages R.D. Middlebrook, S. Ćuk · International Journal of Electronics | Jun 1977 | 1,424 |
| 17 | Parameter variations and impact on circuits and microarchitecture Shekhar Y. Borkar, Tanay Karnik, S. Narendra et al. | 2 Jun 2003 | 1,412 |
| 18 | Hitting the Memory Wall: Implications of the Obvious Wm. A. Wulf, Sally A. McKee | 1995 | 1,398 |
| 19 | Efficient linear circuit analysis by Pade approximation via the Lanczos process P. Feldmann, R.W. Freund · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | May 1995 | 1,356 |
| 20 | Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation Shekhar Y. Borkar · IEEE Micro | Nov 2005 | 1,332 |
| 21 | New spectral methods for ratio cut partitioning and clustering L. Hagen, Andrew B. Kahng · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1992 | 1,300 |
| 22 | Signed-Digit Numbe Representations for Fast Parallel Arithmetic Algirdas Avižienis · IEEE Transactions on Electronic Computers | Sep 1961 | 1,259 |
| 23 | A survey of design techniques for system-level dynamic power management Luca Benini, Alessandro Bogliolo, Givanni De Micheli · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Jun 2000 | 1,240 |
| 24 | Leakage current: Moore's law meets static power N.S. Kim, T. Austin, D. Blaauw et al. · Computer | Dec 2003 | 1,230 |
| 25 | Design challenges of technology scaling Shekhar Y. Borkar · IEEE Micro | 1999 | 1,171 |
| 26 | MIS: A Multiple-Level Logic Optimization System Robert K. Brayton, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Nov 1987 | 1,164 |
| 27 | A Regular Layout for Parallel Adders Brent, Kung · IEEE Transactions on Computers | Mar 1982 | 1,149 |
| 28 | 1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS S. Mutoh, T. Douseki, Y. Matsuya et al. · IEEE Journal of Solid-State Circuits | 1995 | 1,125 |
| 29 | Wattch: a framework for architectural-level power analysis and optimizations David M. Brooks, Vivek Tiwari, Margaret Martonosi | 7 Nov 2002 | 1,124 |
| 30 | HotSpot: a compact thermal modeling methodology for early-stage VLSI design Wei Huang, Sudeep Ghosh, S. Velusamy et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | May 2006 | 1,116 |
| 31 | Force-directed scheduling for the behavioral synthesis of ASICs Pierre G. Paulin, John P. Knight · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Jun 1989 | 1,115 |
| 32 | Scheduling for Reduced CPU Energy Mark Weiser, Brent B. Welch, Alan J. Demers et al. | 1994 | 1,103 |
| 33 | Approximate computing: An emerging paradigm for energy-efficient design Jie Han, Michael Orshansky | May 2013 | 1,098 |
| 34 | A multilevel algorithm for partitioning graphs Bruce Hendrickson, Robert W. Leland | 1995 | 1,079 |
| 35 | Razor: a low-power pipeline based on circuit-level timing speculation Dan Ernst, Nam Sung Kim, Shidhartha Das et al. | 3 Dec 2003 | 1,078 |
| 36 | A Survey of Techniques for Approximate Computing Sparsh Mittal · ACM Computing Surveys | 18 Mar 2016 | 1,062 |
| 37 | Measuring the Gap Between FPGAs and ASICs Ian Kuon, Jonathan Rose · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 23 Jan 2007 | 1,014 |
| 38 | Minimizing power consumption in digital CMOS circuits Anantha P. Chandrakasan, R.W. Brodersen · Proceedings of the IEEE | Apr 1995 | 1,013 |
| 39 | 1/f noise sources F.N. Hooge · IEEE Transactions on Electron Devices | 1994 | 1,007 |
| 40 | The cube-connected cycles: a versatile network for parallel computation Franco P. Preparata, Jean E. Vuillemin · Communications of the ACM | May 1981 | 983 |
| 41 | Bus-invert coding for low-power I/O Mircea R. Stan, Wayne P. Burleson · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Mar 1995 | 975 |
| 42 | The future of microprocessors Shekhar Y. Borkar, Andrew A. Chien · Communications of the ACM | 26 Apr 2011 | 975 |
| 43 | Reconfiguration of electric distribution networks for resistive line losses reduction Dariush Shirmohammadi, Hong Hu · IEEE Transactions on Power Delivery | Apr 1989 | 961 |
| 44 | Very high-speed computing systems Michael J. Flynn · Proceedings of the IEEE | 1966 | 956 |
| 45 | Low-power logic styles: CMOS versus pass-transistor logic R. Zimmermann, Wolf Fïchtner · IEEE Journal of Solid-State Circuits | Jul 1997 | 939 |
| 46 | Fractional quantum Hall effect and insulating phase of Dirac electrons in graphene Xu Sheng Du, Ivan Skachko, Fabian Duerr et al. · Nature | 14 Oct 2009 | 929 |
| 47 | A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter Andrew Abo, P.R. Gray · IEEE Journal of Solid-State Circuits | May 1999 | 925 |
| 48 | A dynamic voltage scaled microprocessor system Tom Burd, Trevor Pering, A. Stratakos et al. · IEEE Journal of Solid-State Circuits | Nov 2000 | 918 |
| 49 | FastCap: a multipole accelerated 3-D capacitance extraction program K. Nabors, Jacob White · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1991 | 912 |
| 50 | Design considerations for high-voltage high-power full-bridge zero-voltage-switched PWM converter Juan A. Sabate, V. Vlatkovic, R.B. Ridley et al. | 1990 | 912 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for a field when OpenAlex files it under one of the field's topics; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.