Topic · VLSI and FPGA Design Techniques
Most cited papers in VLSI and FPGA Design Techniques
What are the most cited papers in VLSI and FPGA Design Techniques?
The most cited paper in VLSI and FPGA Design Techniques is "Optimization by Simulated Annealing" (Scott Kirkpatrick, C. D. Gelatt, Mario P. Vecchi, 1983), with 45,251 citations. Next come "Multilayer feedforward networks are universal approximators" (21,792) and "Simple statistical gradient-following algorithms for connectionist reinforcement learning" (7,519).
Showing 50 of 99 papers. Every paper with more than 522 citations is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | Optimization by Simulated Annealing Scott Kirkpatrick, C. D. Gelatt, Mario P. Vecchi · Science | 13 May 1983 | 45,251 |
| 2 | Multilayer feedforward networks are universal approximators Kurt Hornik, Maxwell B. Stinchcombe, Halbert White · Neural Networks | 1989 | 21,792 |
| 3 | Simple statistical gradient-following algorithms for connectionist reinforcement learning Ronald J. Williams · Machine Learning | May 1992 | 7,519 |
| 4 | Networks on chips: a new SoC paradigm Luca Benini, Giovanni De Micheli · Computer | 2002 | 3,769 |
| 5 | Routing of multipoint connections Bernard M. Waxman · IEEE Journal on Selected Areas in Communications | 1988 | 2,897 |
| 6 | Wattch David M. Brooks, Vivek Tiwari, Margaret Martonosi | 2000 | 2,588 |
| 7 | Universal approximation of an unknown mapping and its derivatives using multilayer feedforward networks Kurt Hornik, Maxwell B. Stinchcombe, Halbert White · Neural Networks | 1990 | 2,138 |
| 8 | Deadlock-Free Message Routing in Multiprocessor Interconnection Networks Dally, Seitz · IEEE Transactions on Computers | May 1987 | 2,048 |
| 9 | Asymptotic waveform evaluation for timing analysis Lawrence T. Pillage, R.A. Rohrer · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Apr 1990 | 1,877 |
| 10 | FFTW: an adaptive software architecture for the FFT Matteo Frigo, Steven G. Johnson | 27 Nov 2002 | 1,828 |
| 11 | Optimization by simulated annealing: Quantitative studies Scott Kirkpatrick · Journal of Statistical Physics | Mar 1984 | 1,818 |
| 12 | Co-clustering documents and words using bipartite spectral graph partitioning Inderjit S. Dhillon | 26 Aug 2001 | 1,723 |
| 13 | On the Connection Assignment Problem of Diagnosable Systems Franco P. Preparata, Gernot Metze, Robert Tien-Wen Chien · IEEE Transactions on Electronic Computers | Dec 1967 | 1,508 |
| 14 | Optimization by Simulated Annealing: An Experimental Evaluation; Part I, Graph Partitioning David S. Johnson, C. Aragon, Lyle A. McGeoch et al. · Operations Research | Dec 1989 | 1,474 |
| 15 | Algorithm 832 Timothy A. Davis · ACM Transactions on Mathematical Software | Jun 2004 | 1,442 |
| 16 | The future of wires R. Ho, Ken Mai, Mark Horowitz · Proceedings of the IEEE | Apr 2001 | 1,441 |
| 17 | RANK ANALYSIS OF INCOMPLETE BLOCK DESIGNS RALPH ALLAN BRADLEY, Milton E. Terry · Biometrika | 1952 | 1,404 |
| 18 | Resistance distance Douglas J. Klein, Milan Randić · Journal of Mathematical Chemistry | Dec 1993 | 1,377 |
| 19 | Fat-trees: Universal networks for hardware-efficient supercomputing Charles E. Leiserson · IEEE Transactions on Computers | Oct 1985 | 1,325 |
| 20 | New spectral methods for ratio cut partitioning and clustering L. Hagen, Andrew B. Kahng · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1992 | 1,300 |
| 21 | A Linear-Time Heuristic for Improving Network Partitions Charles M. Fiduccia, Robert M. Mattheyses | 1982 | 1,286 |
| 22 | A tutorial on geometric programming Stephen Boyd, Seung-Jean Kim, Lieven Vandenberghe et al. · Optimization and Engineering | Mar 2007 | 1,230 |
| 23 | Zero Duality Gap in Optimal Power Flow Problem Javad Lavaei, Steven H. Low · IEEE Transactions on Power Systems | 15 Aug 2011 | 1,216 |
| 24 | A fast algorithm for Steiner trees Lawrence T. Kou, George Markowsky, Leonard Berman · Acta Informatica | 1981 | 1,197 |
| 25 | SCIP: solving constraint integer programs Tobias Achterberg · Mathematical Programming Computation | 19 Jan 2009 | 1,181 |
| 26 | MIS: A Multiple-Level Logic Optimization System Robert K. Brayton, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Nov 1987 | 1,164 |
| 27 | A Regular Layout for Parallel Adders Brent, Kung · IEEE Transactions on Computers | Mar 1982 | 1,149 |
| 28 | VPR: a new packing, placement and routing tool for FPGA research Vaughn Betz, Jonathan Rose · Lecture notes in computer science | 1997 | 1,128 |
| 29 | Wattch: a framework for architectural-level power analysis and optimizations David M. Brooks, Vivek Tiwari, Margaret Martonosi | 7 Nov 2002 | 1,124 |
| 30 | An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits Goel · IEEE Transactions on Computers | Mar 1981 | 1,124 |
| 31 | A multilevel algorithm for partitioning graphs Bruce Hendrickson, Robert W. Leland | 1995 | 1,079 |
| 32 | Efficient Algorithms for Shortest Paths in Sparse Networks Donald Barton Johnson · Journal of the ACM | 1977 | 1,055 |
| 33 | A data structure for dynamic trees Daniel D. Sleator, Robert Endre Tarjan · Journal of Computer and System Sciences | Jun 1983 | 1,041 |
| 34 | High ― Level Synthesis: Introduction to Chip and System Design Daniel D. Gajski, Nikil D. Dutt, Allen C.-H. Wu et al. · CERN Document Server (European Organization for Nuclear Research) | 29 Feb 1992 | 1,021 |
| 35 | Minimizing power consumption in digital CMOS circuits Anantha P. Chandrakasan, R.W. Brodersen · Proceedings of the IEEE | Apr 1995 | 1,013 |
| 36 | Retiming synchronous circuitry Charles E. Leiserson, James B. Saxe · Algorithmica | Jun 1991 | 1,001 |
| 37 | Algorithm 447: efficient algorithms for graph manipulation John E. Hopcroft, Robert Endre Tarjan · Communications of the ACM | Jun 1973 | 996 |
| 38 | Local Graph Partitioning using PageRank Vectors Reid Andersen, Fan Chung, Kevin Lang | 2006 | 995 |
| 39 | Bus-invert coding for low-power I/O Mircea R. Stan, Wayne P. Burleson · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Mar 1995 | 975 |
| 40 | Reconfiguration of electric distribution networks for resistive line losses reduction Dariush Shirmohammadi, Hong Hu · IEEE Transactions on Power Delivery | Apr 1989 | 961 |
| 41 | Chisel Jonathan Bachrach, Huy T. Vo, Brian C. Richards et al. | 31 May 2012 | 938 |
| 42 | Signal Delay in RC Tree Networks J. Rubinstein, Paul Penfield, Mark Horowitz · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Jul 1983 | 851 |
| 43 | Demystifying 3D ICs: The Pros and Cons of Going Vertical William Rhett Davis, John Wilson, Stephen E. Mick et al. · IEEE Design & Test of Computers | Jun 2005 | 841 |
| 44 | A min-max cut algorithm for graph partitioning and data clustering Chris H. Q. Ding, Xiaofeng He, Hongyuan Zha et al. | 14 Nov 2002 | 837 |
| 45 | A logic design structure for LSI testability E. B. Eichelberger, T.W. Williams · Design Automation Conference | 1977 | 835 |
| 46 | Voltage scheduling problem for dynamically variable voltage processors Tohru Ishihara, Hiroto Yasuura | 1998 | 814 |
| 47 | Multilevel hypergraph partitioning: applications in VLSI domain George Karypis, Ritesh Aggarwal, Vipin Kumar et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Mar 1999 | 813 |
| 48 | Cramming more components onto integrated circuits, Reprinted from Electronics, volume 38, number 8, April 19, 1965, pp.114 ff. Gordon E. Moore · IEEE Solid-State Circuits Society Newsletter | Sep 2006 | 812 |
| 49 | Simulated annealing algorithms: an overview Rob A. Rutenbar · IEEE Circuits and Devices Magazine | 1989 | 811 |
| 50 | CVXGEN: a code generator for embedded convex optimization Jacob Mattingley, Stephen Boyd · Optimization and Engineering | 5 Nov 2011 | 808 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for a field when OpenAlex files it under one of the field's topics; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.