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Institution · Siliconware Precision Industries (Taiwan)

Most cited papers from Siliconware Precision Industries (Taiwan)

Siliconware Precision Industries (Taiwan)

What are the most cited papers from Siliconware Precision Industries (Taiwan)?

The most cited paper from Siliconware Precision Industries (Taiwan) is "Effects of limited cu supply on soldering reactions between SnAgCu and Ni" (Cheng–En Ho, You-Cian Lin, Shenghao Yang et al., 2006), with 145 citations. Next come "38-GHz Phased Array Transmitter and Receiver Based on Scalable Phased Array Modules With Endfire Antenna Arrays for 5G MMW Data Links" (110) and "Tree-Based Machine Learning Models with Optuna in Predicting Impedance Values for Circuit Analysis" (70).

Showing 50 of 61 papers. Every paper with more than 14 citations is listed.

Most cited papers, sortable by citations and release date
#Paper
1 Effects of limited cu supply on soldering reactions between SnAgCu and Ni Cheng–En Ho, You-Cian Lin, Shenghao Yang et al. · Journal of Electronic Materials May 2006 145
2 38-GHz Phased Array Transmitter and Receiver Based on Scalable Phased Array Modules With Endfire Antenna Arrays for 5G MMW Data Links Chun-Nien Chen, Yi-Hsien Lin, Li-Cheng Hung et al. · IEEE Transactions on Microwave Theory and Techniques 12 Nov 2020 110
3 Tree-Based Machine Learning Models with Optuna in Predicting Impedance Values for Circuit Analysis Jung-Pin Lai, Ying-Lei Lin, Ho-Chuan Lin et al. · Micromachines Open access 20 Jan 2023 70
4 Fabrication of High Aspect Ratio TSV and Assembly With Fine-Pitch Low-Cost Solder Microbump for Si Interposer Technology With High-Density Interconnects Aibin Yu, John Hon-Shing Lau, Soon Wee Ho et al. · IEEE Transactions on Components Packaging and Manufacturing Technology 21 Jul 2011 66
5 Warpage characterization of panel Fan-out (P-FO) package Hung‐wen Liu, Yiwei Liu, Jason Ji et al. Conference paper May 2014 63
6 Effects of underfill materials on the reliability of low-K flip-chip packaging K.M. Chen, Don Son Jiang, Nicholas Kao et al. · Microelectronics Reliability 15 Jun 2005 56
7 Development and characterization of new generation panel fan-out (P-FO) packaging technology Hong-Da Chang, David Chang, Kenny Liu et al. Conference paper May 2014 56
8 Three dimensional interconnects with high aspect ratio TSVs and fine pitch solder microbumps Aibin Yu, John Hon-Shing Lau, Soon Wee Ho et al. Conference paper May 2009 52
9 Silver alloy wire bonding Liao Kai, Liang Yi Hung, Li Wei Wu et al. Conference paper May 2012 52
10 Scalable Chiplet package using Fan-Out Embedded Bridge Joe Lin, C. Key Chung, C. F. Lin et al. Conference paper Jun 2020 46
11 Assessing the impact of quality determinants and user characteristics on successful enterprise resource planning project implementation Jui‐Sheng Chou, Jhih-Hao Hong · Journal of Manufacturing Systems 3 Jun 2013 40
12 EMI Shielding Technology in 5G RF System in Package Module Jay Li, Mike Tsai, Ryan Chiu et al. Conference paper Jun 2020 38
13 Characterization of molded underfill material for flip chip ball grid array packages F. Liu, Y.P. Wang, Kevin Tshun Chuan Chai et al. Conference paper 13 Nov 2002 34
14 Generational changes of flip chip interconnection technology Wen Shan Tsai, Chi-Yen Huang, C. Key Chung et al. Conference paper Oct 2017 32
15 Oxidation characteristics of commercial copper-based lead frame surface and the bonding with epoxy molding compounds Shih-Chieh Chao, Weichen Huang, Jen-Hsiang Liu et al. · Microelectronics Reliability 18 Jun 2019 30
16 Sliding-Mode Tracking Control With DNLRX Model-Based Friction Compensation for the Precision Stage Jing‐Chung Shen, Qun-Zhong Lu, Chia-Hung Wu et al. · IEEE/ASME Transactions on Mechatronics 20 Feb 2014 28
17 Development of Fine Pitch Solder Microbumps for 3D Chip Stacking Aibin Yu et al. Conference paper Dec 2008 28
18 Integration challenges of TSV backside via reveal process Huang Bo, Chien Ming Lin, Shin Jiang Huang et al. Conference paper May 2013 28
19 Electrical characterization and structure investigation of quad flat non-lead package for RFIC applications Nansen Chen, Kevin Chiang, T.D. Her et al. · Solid-State Electronics 2 Dec 2002 28
20 Cost Effective and High Performance 28nm FPGA with New Disruptive Silicon-Less Interconnect Technology (SLIT) Woon‐Seong Kwon, Suresh Ramalingam, Xin Wu et al. · IMAPSource Proceedings Conference paper Oct 2014 27
21 Enabling a Manufacturable 3D Technologies and Ecosystem using 28nm FPGA with Stack Silicon Interconnect Technology Woon‐Seong Kwon, Myongseob Kim, Jonathan Chang et al. · IMAPSource Proceedings Conference paper 2013 26
22 An integrated system for setting the optimal parameters in IC chip-package wire bonding processes Tung‐Hsu Hou, Shyh-Huei Chen, Tzu‐Yu Lin et al. · The International Journal of Advanced Manufacturing Technology 16 Nov 2005 26
23 Intermetallic compound formation and growth behavior at the interface between indium and Au/Ni(V) metallization Li‐Chi Huang, Yan-Ping Zhang, Chih‐Ming Chen et al. · Materials Characterization 14 Dec 2021 25
24 Mm-Wave Antenna in Package (AiP) Design Applied to 5th Generation (5G) Cellular User Equipment Using Unbalanced Substrate Yingwei Lu, Bo-Siang Fang, Hsuan-Hao Mi et al. Conference paper May 2018 25
25 Evaluation of Ag wire reliability on fine pitch wire bonding Jiaqing Xi, Norbe Mendoza, Kai Chen et al. Conference paper May 2015 25
26 Analysis of Warpage and Stress Behavior in a Fine Pitch Multi-Chip Interconnection with Ultrafine-Line Organic Substrate (2.1D) Chenyu Huang, Yuan‐Hung Hsu, Ying-Ju Lu et al. Conference paper May 2018 24
27 Warpage and Stress Characteristic Analyses on Package-on-Package (PoP) Structure Yuan Lin Tzeng, Nicholas Kao, Eason Chen et al. Conference paper Dec 2007 23
28 Dynamic state-dependent dispatching for wafer fabrication James C. Chen, C.-W. Chen, Chih-Ming Tai et al. · International Journal of Production Research Nov 2004 23
29 Encapsulation challenges for wafer level packaging Eric Kuah Th, J Y Hao, J P Ding et al. Conference paper Dec 2009 23
30 Innovative Packaging Solutions of 3D Double Side Molding with System in Package for IoT and 5G Application Mike Tsai, Ryan Chiu, Dick Huang et al. Conference paper May 2019 22
31 The study of OSP as reliable surface finish of BGA substrate David Chang, Fengsong Bai, Y.P. Wang et al. Conference paper 21 Mar 2005 22
32 Large Size Multilayered Fan-Out RDL Packaging for Heterogeneous Integration Jay Lia, F. J. Tsai, Jackson Li et al. · 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC) Conference paper 7 Dec 2021 21
33 High Reliability Solution of 2.5D Package Technologies Hsin Jou Lin, Vito Lin, Joe Lin et al. · 2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC) Conference paper 7 Dec 2021 21
34 Challenges of Ultra-Thin 5 Sides Molded WLCSP Tom Tang, Albert Lan, Jason H. Y. Wu et al. Conference paper May 2016 21
35 An RDL UBM Structural Design for Solving Ultralow-K Delamination Problem of Cu Pillar Bump Flip Chip BGA Packaging K. M. Chen, C. Y. Wu, Chunhui Wang et al. · Journal of Electronic Materials 19 Aug 2014 21
36 Direct liquid cooling For IGBT power module Chun-Kai Liu, Yu-Lin Chao, Shu-Jung Yang et al. Conference paper Oct 2014 21
37 High Density Integration of Silicon Photonic Chiplets for 51.2T Co-packaged Optics Sukeshwar Kannan, Ray Chang, Hari Potluri et al. Conference paper 28 May 2024 20
38 Innovative Fan-Out Embedded Bridge Structure for Co-Packaged Optics Jay Li, Terry Hsu, Ming-Han Zhuan et al. Conference paper May 2023 20
39 Electrical Performances of Fan-Out Embedded Bridge JinWei You, Jay Li, David Soon Wee Ho et al. Conference paper Jun 2021 20
40 The Development and the Integration of the 5 µm to 1 µm Half Pitches Wafer Level Cu Redistribution Layers Mike Ma, Stephen Y. Chen, Po-I Wu et al. Conference paper May 2016 20
41 Cost-performance wafer thinning technology Li Wei Wu, James W. Chan, C. S. Hsiao Conference paper 22 Jun 2004 20
42 Comparative Analysis of Electrical Performance on Coreless and Standard Flip-Chip Substrate Robert Sung, Kevin Chiang, Yu-Po Wang et al. Conference paper 2007 20
43 Interfacial reactions between pure indium solder and Au/Ni metallization Li‐Chi Huang, Yanping Zhang, Chih‐Ming Chen et al. · Journal of Materials Science Materials in Electronics 2 May 2022 19
44 Applying Fuzzy Logic Control to an Electric Bicycle Chi-Ying Liang, Wai-Hon Lin, Betty Chang Conference paper 24 Oct 2006 19
45 3D Micro Bump Interface Enabling Top Die Interconnect to True Circuit Through Silicon Via Wafer Nistec Chang, C. Key Chung, Yu-Po Wang et al. Conference paper Jun 2020 18
46 Assembly Challenges for 75x75mm Large Body FCBGA with Emerging High Thermal Interface Material (TIM) Fletcher Tung, Max Lu, Albert Lan et al. Conference paper May 2017 18
47 Warpage Tuning Study for Multi-chip Last Fan Out Wafer Level Package Hung‐Yuan Li, Allen Menglin Chen, Sam Peng et al. Conference paper May 2017 17
48 Assembly and Reliability Challenges for Next Generation High Thermal TIM Materials Chi-An Pan, Chi-Tung Yeh, Wei-Chun Qiu et al. Conference paper May 2017 17
49 Effect of Sn grain orientation and strain distribution in 20-μm-diameter microbumps on crack formation under thermal cycling tests Yi‐Cheng Chu, Chih Chen, Nicholas Kao et al. · Electronic Materials Letters 24 Jun 2017 17
50 Underfill Assessments and Validations for Low-k FCBGA Nicholas Kao, Jeng Yuan Lai, Jase Jiang et al. · Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology Conference paper 2006 17

Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for an institution when any of its authors gave it as an affiliation; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.