Topic · VLSI and Analog Circuit Testing
Most cited papers in VLSI and Analog Circuit Testing
What are the most cited papers in VLSI and Analog Circuit Testing?
The most cited paper in VLSI and Analog Circuit Testing is "Graph-Based Algorithms for Boolean Function Manipulation" (Bryant, 1986), with 8,956 citations. Next come "Asymptotically Efficient Rank Invariant Test Procedures" (3,431) and "Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization" (1,870).
Showing 50 of 100 papers. Every paper with more than 436 citations is listed.
| # | Paper | ||
|---|---|---|---|
| 1 | Graph-Based Algorithms for Boolean Function Manipulation Bryant · IEEE Transactions on Computers | Aug 1986 | 8,956 |
| 2 | Asymptotically Efficient Rank Invariant Test Procedures Richard Peto, Julian Peto · Journal of the Royal Statistical Society Series A (General) | 1972 | 3,431 |
| 3 | Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization Christian Enz, Gábor C. Temes · Proceedings of the IEEE | 1996 | 1,870 |
| 4 | Binary Decision Diagrams Akers · IEEE Transactions on Computers | Jun 1978 | 1,834 |
| 5 | On the Connection Assignment Problem of Diagnosable Systems Franco P. Preparata, Gernot Metze, Robert Tien-Wen Chien · IEEE Transactions on Electronic Computers | Dec 1967 | 1,508 |
| 6 | Radiation-induced soft errors in advanced semiconductor technologies R. Baumann · IEEE Transactions on Device and Materials Reliability | Sep 2005 | 1,466 |
| 7 | Efficient linear circuit analysis by Pade approximation via the Lanczos process P. Feldmann, R.W. Freund · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | May 1995 | 1,356 |
| 8 | Signed-Digit Numbe Representations for Fast Parallel Arithmetic Algirdas Avižienis · IEEE Transactions on Electronic Computers | Sep 1961 | 1,259 |
| 9 | A network on chip architecture and design methodology Shashi Bhusan Kumar, Axel Jantsch, Juha-Pekka Soininen et al. | 25 Jun 2003 | 1,205 |
| 10 | Upset hardened memory design for submicron CMOS technology T. Calin, M. Nicolaidis, Raoul Velazco · IEEE Transactions on Nuclear Science | Dec 1996 | 1,169 |
| 11 | Supporting Controlled Experimentation with Testing Techniques: An Infrastructure and its Potential Impact Hyunsook Do, Sebastian G. Elbaum, Gregg Rothermel · Empirical Software Engineering | 28 Sep 2005 | 1,166 |
| 12 | Basic mechanisms and modeling of single-event upset in digital microelectronics P.E. Dodd, Lloyd W. Massengill · IEEE Transactions on Nuclear Science | Jun 2003 | 1,158 |
| 13 | Access and Alignment of Data in an Array Processor Duncan H. Lawrie · IEEE Transactions on Computers | Dec 1975 | 1,121 |
| 14 | The AETG system: an approach to testing based on combinatorial design David Marshall Cohen, Siddhartha R. Dalal, Michael L. Fredman et al. · IEEE Transactions on Software Engineering | Jul 1997 | 1,034 |
| 15 | Radiation-Induced Soft Errors in Advanced Semiconductor Technologies Robert Baumann · IEEE Transactions on Device and Materials Reliability | 2005 | 975 |
| 16 | Bus-invert coding for low-power I/O Mircea R. Stan, Wayne P. Burleson · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Mar 1995 | 975 |
| 17 | Diagnostic reasoning based on structure and behavior Randall Davis · Artificial Intelligence | Dec 1984 | 972 |
| 18 | ABC: An Academic Industrial-Strength Verification Tool Robert K. Brayton, Alan Mishchenko · Lecture notes in computer science | 2010 | 950 |
| 19 | Parity, circuits, and the polynomial-time hierarchy Merrick L. Furst, James B. Saxe, Michael Sipser · Theory of Computing Systems | Dec 1984 | 942 |
| 20 | Fault injection techniques and tools Mei-Chen Hsueh, Timothy K. Tsai, Ravishankar K. Iyer · Computer | Apr 1997 | 881 |
| 21 | Signal Delay in RC Tree Networks J. Rubinstein, Paul Penfield, Mark Horowitz · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | Jul 1983 | 851 |
| 22 | A logic design structure for LSI testability E. B. Eichelberger, T.W. Williams · Design Automation Conference | 1977 | 835 |
| 23 | Soft Errors in Advanced Computer Systems R. Baumann · IEEE Design & Test of Computers | May 2005 | 834 |
| 24 | A systematic methodology to compute the architectural vulnerability factors for a high performance microprocessor Shubhendu S. Mukherjee, Christopher T. Weaver, Joel Emer et al. | 2003 | 834 |
| 25 | On the Acceleration of Test Generation Algorithms Fujiwara, Shimono · IEEE Transactions on Computers | Dec 1983 | 824 |
| 26 | Characterization of Tor Traffic using Time based Features Arash Habibi Lashkari, Gerard Draper Gil, Mohammad Saiful Islam Mamun et al. | 2017 | 804 |
| 27 | Noise strategies for improving local search Bart Selman, Henry Kautz, Brain Cohen | 5 Oct 1994 | 761 |
| 28 | On the Accuracy of Spectrum-based Fault Localization Rui Abreu, Peter Zoeteweij, Arjan J. C. van Gemund | Sep 2007 | 739 |
| 29 | Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage James W. Tschanz, James T. Kao, S. Narendra et al. · IEEE Journal of Solid-State Circuits | Nov 2002 | 730 |
| 30 | Exact and approximate unitary 2-designs and their application to fidelity estimation Christoph Dankert, Richard Cleve, Joseph Emerson et al. · Physical Review A | 6 Jul 2009 | 711 |
| 31 | Test pattern generation using Boolean satisfiability Tracy Larrabee · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1992 | 710 |
| 32 | Symbolic model checking using SAT procedures instead of BDDs Armin Biere, Alessandro Cimatti, E. M. Clarke et al. | Jun 1999 | 701 |
| 33 | PathFinder L. McMurchie, Carl W. Ebeling | 15 Feb 1995 | 688 |
| 34 | A new golden age for computer architecture John LeRoy Hennessy, David A. Patterson · Communications of the ACM | 28 Jan 2019 | 686 |
| 35 | The theory of error-correcting codes James L. Massey · Proceedings of the IEEE | 1980 | 685 |
| 36 | FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs J. Cong, Yuzheng Ding · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1994 | 684 |
| 37 | Application of Boolean algebra to switching circuit design and to error detection David E. Muller · Transactions of the I R E Professional Group on Electronic Computers | Sep 1954 | 678 |
| 38 | A survey of power estimation techniques in VLSI circuits Farid N. Najm · IEEE Transactions on Very Large Scale Integration (VLSI) Systems | Dec 1994 | 676 |
| 39 | First-order incremental block-based statistical timing analysis Chandramouli Visweswariah, Kaushik Ravindran, Kerim Kalafala et al. | 7 Jun 2004 | 662 |
| 40 | A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor S. Mukherjee, Christopher T. Weaver, Joel Emer et al. | 2003 | 659 |
| 41 | Hardware Trojan detection using path delay fingerprint Yier Jin, Yiorgos Makris | Jun 2008 | 646 |
| 42 | The high-level synthesis of digital systems M.C. McFarland, Alice C. Parker, Raúl Camposano · Proceedings of the IEEE | 1990 | 627 |
| 43 | Trends and challenges in VLSI circuit reliability Cris S. Constantinescu · IEEE Micro | Jul 2003 | 618 |
| 44 | Computer-aided design of analog and mixed-signal integrated circuits Georges E. Gielen, Rob A. Rutenbar · Proceedings of the IEEE | Dec 2000 | 616 |
| 45 | Sequential circuit design using synthesis and optimization Ellen M. Sentovich, K.J. Singh, Cho W. Moon et al. | 2 Jan 2003 | 616 |
| 46 | Branch Prediction Strategies and Branch Target Buffer Design Lee, Smith · Computer | 1984 | 614 |
| 47 | Multiple-Valued Logic—its Status and its Future Hurst · IEEE Transactions on Computers | Dec 1984 | 611 |
| 48 | Impact of CMOS technology scaling on the atmospheric neutron soft error rate P. Hazucha, Christina Svensson · IEEE Transactions on Nuclear Science | Dec 2000 | 599 |
| 49 | Separating Reliability and Stability in Test-Retest Correlation David R. Heise · American Sociological Review | Feb 1969 | 592 |
| 50 | Small forwarding tables for fast routing lookups Mikael Degermark, Andrej Brodnik, Svante Carlsson et al. | Oct 1997 | 591 |
Citations are OpenAlex's own counts, from its 2026-09-23 snapshot, so the ranking can differ from Google Scholar or Web of Science. A paper is listed for a field when OpenAlex files it under one of the field's topics; retracted papers and papers whose citation count cannot be traced to citing works are left out, and a preprint and the article it became are shown once. Release dates are OpenAlex's: where a source gave only a month or a year, that is what is shown. How the lists are chosen.