Peter Suaris
Peter Suaris publishes mostly in Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications, on topics such as VLSI and FPGA Design Techniques, Low-power high-performance VLSI design and Embedded Systems Design Techniques.
- World rank
- #4,069,979 of 7,710,434 ranked researchers
- Rank in United States
- #1,106,150 of 1,627,098
- Works
- 22
- Citations
- 359
- Citations per work
- 16.3
What does Peter Suaris research?
Peter Suaris's work is mostly in Engineering (52%), Computer Science (44%).
Their six largest subfields, inside their fields and domains; the grey slice is everything else they publish. The interactive view splits every one of their works down to single topics.
The fields and subfields, with their numbers
- Physical Sciences2195.5%
- Engineering1151.5%
- Computer Science1044.0%
- Everything else14.5%
- 1Electrical and Electronic Engineering50% of their works
- 2Hardware and Architecture29% of their works
- 3Computer Networks and Communications8% of their works
- 4Computational Theory and Mathematics6% of their works
- 5Building and Construction2% of their works
- 6Computer Graphics and Computer-Aided Design2% of their works
Research topics
Which keywords describe Peter Suaris's research?
The keywords of their largest research topics: FPGA, Power Optimization, ASIC, Placement, Low-Power, VLSI Circuits, High-Level Synthesis and Reconfigurable Computing.
- Symbolic Model Checker
- Through-Silicon Via
- Performance Optimization
- Networks on Chip
- Test Data Compression
- Reconfigurable Computing
- VLSI Circuits
- Placement
- Power Optimization
- FPGA
- ASIC
- Low-Power
- High-Level Synthesis
- Embedded Cores
- Interconnection Networks
- Parallel Computing
- Interconnect
- Model Checking
Size is their works in the topics tagged with each word, from their 8 largest topics. Each links to the topic it comes from most.
All 18 words, with their numbers
- FPGA262 topics
- Power Optimization222 topics
- ASIC181 topic
- Placement181 topic
- Low-Power111 topic
- VLSI Circuits111 topic
- High-Level Synthesis81 topic
- Reconfigurable Computing81 topic
- Embedded Cores61 topic
- Test Data Compression61 topic
- Interconnection Networks41 topic
- Networks on Chip41 topic
- Parallel Computing41 topic
- Performance Optimization41 topic
- Interconnect31 topic
- Through-Silicon Via31 topic
- Model Checking21 topic
- Symbolic Model Checker21 topic
Where does Peter Suaris work?
Peter Suaris's main affiliation in the publication record is Mentor Technologies, United States.
How many publications and citations does Peter Suaris have?
OpenAlex counts 22 works and 359 citations for Peter Suaris, an h-index of 7, ranking #4,069,979 of 7,710,434 researchers worldwide on the quality score.
Ranked on field-normalised excellence (50%), output (30%) and citations (20%). Counts come from OpenAlex author records, which occasionally merge different people who share a name or split one person into several.
Papers, co-authors, who cited this work and researchers on the nearest topics have tabs of their own, above. Is this your page? Claim it with your ORCID iD, or request a correction or removal.
Discussion
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