S. Pateras
S. Pateras publishes mostly in Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications, on topics such as VLSI and Analog Circuit Testing, Integrated Circuits and Semiconductor Failure Analysis and Interconnection Networks and Systems.
- World rank
- #3,325,450 of 7,710,434 ranked researchers
- Rank in United States
- #938,603 of 1,627,098
- Works
- 22
- Citations
- 373
- Citations per work
- 17.0
What does S. Pateras research?
S. Pateras's work is mostly in Engineering (55%), Computer Science (44%).
Their six largest subfields, inside their fields and domains; the grey slice is everything else they publish. The interactive view splits every one of their works down to single topics.
The fields and subfields, with their numbers
- Physical Sciences2298.4%
- Engineering1254.7%
- Computer Science1043.7%
- 1Electrical and Electronic Engineering44% of their works
- 2Hardware and Architecture33% of their works
- 3Computer Networks and Communications8% of their works
- 4Control and Systems Engineering8% of their works
- 5Mechanical Engineering3% of their works
- 6Software3% of their works
Research topics
Which keywords describe S. Pateras's research?
The keywords of their largest research topics: Embedded Cores, Test Data Compression, Failure Analysis, Integrated Circuits, Fault Tolerance, CMOS Technology, Fault Diagnosis and Interconnection Networks.
- Software Fault Localization
- High-Level Synthesis
- Soft Errors
- Radiation Effects
- Sequential Testing Algorithms
- Interconnection Networks
- CMOS Technology
- Integrated Circuits
- Test Data Compression
- Embedded Cores
- Failure Analysis
- Fault Tolerance
- Fault Diagnosis
- Networks on Chip
- ESD Protection
- SCR Devices
- Automated Testing
- Reconfigurable Computing
Size is their works in the topics tagged with each word, from their 8 largest topics. Each links to the topic it comes from most.
All 18 words, with their numbers
- Embedded Cores181 topic
- Test Data Compression181 topic
- Failure Analysis151 topic
- Integrated Circuits151 topic
- Fault Tolerance82 topics
- CMOS Technology62 topics
- Fault Diagnosis51 topic
- Interconnection Networks51 topic
- Networks on Chip51 topic
- Sequential Testing Algorithms51 topic
- ESD Protection31 topic
- Radiation Effects31 topic
- SCR Devices31 topic
- Soft Errors31 topic
- Automated Testing21 topic
- High-Level Synthesis21 topic
- Reconfigurable Computing21 topic
- Software Fault Localization21 topic
Where does S. Pateras work?
S. Pateras's main affiliation in the publication record is Cirrus Logic (United States), United States.
How many publications and citations does S. Pateras have?
OpenAlex counts 22 works and 373 citations for S. Pateras, an h-index of 9, ranking #3,325,450 of 7,710,434 researchers worldwide on the quality score.
Ranked on field-normalised excellence (50%), output (30%) and citations (20%). Counts come from OpenAlex author records, which occasionally merge different people who share a name or split one person into several.
Papers, co-authors, who cited this work and researchers on the nearest topics have tabs of their own, above. Is this your page? Claim it with your ORCID iD, or request a correction or removal.
Discussion
Ask a question or share a note about S. Pateras. Posts are plain text and can be reported.